E-Book, Englisch, 544 Seiten
Reihe: Electronic Design Automation for Integrated Circuits Hdbk
Scheffer / Lavagno / Martin EDA for IC System Design, Verification, and Testing
1. Auflage 2010
ISBN: 978-1-4200-0794-7
Verlag: Taylor & Francis
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)
E-Book, Englisch, 544 Seiten
Reihe: Electronic Design Automation for Integrated Circuits Hdbk
ISBN: 978-1-4200-0794-7
Verlag: Taylor & Francis
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)
Presenting a comprehensive overview of the design automation algorithms, tools, and methodologies used to design integrated circuits, the Electronic Design Automation for Integrated Circuits Handbook is available in two volumes. The first volume, EDA for IC System Design, Verification, and Testing, thoroughly examines system-level design, microarchitectural design, logical verification, and testing. Chapters contributed by leading experts authoritatively discuss processor modeling and design tools, using performance metrics to select microprocessor cores for IC designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more. Save on the complete set.
Zielgruppe
Electronic design automation professionals, integrated circuit designers, computer-aided designers, computer engineers, and computer scientists.
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
Introduction. The IC Design Process and EDA. Tools and Methodologies for System-Level Design. System-level specification and modeling languages. SoC Block Based Design and IP Assembly. Performance Evaluation Methods for MPSoC Design. Processor Modeling and Design Tools. Embedded Software Modeling and Design. Using Performance Metrics to Select Microprocessor Cores for IC Designs. Parallelizing High-Level Synthesis: A Code Transformational Approach to High-Level Synthesis. Cycle-Accurate System-Level Modeling and Performance Evaluation. Micro-Architectural Power Estimation and Optimization. Design Planning. Design and Verification Languages. Digital Simulation. Using Transactional Level Models in a SoC Design Flow. Assertion-based verification. Hardware Acceleration and Emulation. Formal Property Verification. Design for Test. Automatic Test Pattern Generation. Analog and Mixed-Signal Test.
