Yuan CMOS Circuits for Passive Wireless Microsystems

1. Auflage 2010
ISBN: 978-1-4419-7680-2
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 279 Seiten

This book provides a comprehensive treatment of CMOS circuits for passive wireless microsystems. Major topics include: an overview of passive wireless microsystems, design challenges of passive wireless microsystems, fundamental issues of ultra-low power wireless communications, radio-frequency power harvesting, ultra-low power modulators and demodulators, ultra-low power temperature-compensated current and voltage references, clock generation and remote calibration, and advanced design techniques for ultra low-power analog signal processing.

About the Author Fei Yuan received the Ph.D. degree in electrical engineering from University of Waterloo, Canada in October 1999. He joined the Department of Electrical andComputer Engineering, RyersonUniversity, Toronto, Canada in 1999 and is currently a Professor. Dr. Yuan is the author of the bookCMOSActive Inductors and Transformers : Principle, Implementation, and Applications (Springer, New York, 2008), CMOS Current Mode Circuits for Data Communications (Springer, New York, 2006), the coauthor of the book Computer Methods for Analysis of Mixed Mode Switching Circuits (withAjoyOpal, KluwerAcademic Publishers, Boston, 2004), and the author / coauthor of 47 research papers in refereed scientific journals and over 90 research papers in refereed conference proceedings in the field of circuits and systems. Dr. Yuan currently serves the Chair of the Department of Electrical and Computer Engineering, Ryerson University. He also serves as the Associate Editor of Canadian Journal of Electrical and Computer Engineering and is on the editorial board of several international journals. He was awarded the Ryerson Research Chair from Ryerson University in Jan. 2005, the Research Excellence Award from the Faculty of Engineering and Applied Science of Ryerson University in 2004, the Early Tenure from Ryerson University in 2002, the Doctoral Scholarship from the Natural Science and Engineering Research Council of Canada during 19971998, and the Teaching Excellence Award from Changzhou Institute of Technology, Jiangsu, China in 1988. Dr. Yuan is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada.

Autoren/Hrsg.

Yuan, Fei

Inhaltsverzeichnis

1;Preface;8
2;Acknowledgments;12
3;Contents;14
4;Chapter 1 PASSIVE WIRELESS MICROSYSTEMS;20
4.1;1.1 The Spectrum;21
4.2;1.2 The Challenges;21
4.2.1;1.2.1 Efficiency of Radio-Frequency Power Harvest;22
4.2.2;1.2.2 Fluctuating Supply Voltage;22
4.2.3;1.2.3 Sensitivity to Changing Environment;23
4.2.4;1.2.4 Precision Voltage References;23
4.2.5;1.2.5 Ultra-Low Power Analog-to-Digital Converters;24
4.2.6;1.2.6 Encryption and Authentication;24
4.2.7;1.2.7 Signal Collision;24
4.2.8;1.2.8 Dimension of Antennas;25
5;Chapter 2 RADIO-FREQUENCY POWER HARVEST;26
5.1;2.1 Characterization of Radio-Frequency Power Harvest;27
5.1.1;2.1.1 Power Matching;27
5.1.2;2.1.2 Power Efficiency;29
5.2;2.2 Voltage Multipliers;30
5.2.1;2.2.1 Voltage Doubler;31
5.2.2;2.2.2 Cockcroft-Walton Voltage Multiplier;32
5.2.3;2.2.3 Dickson Voltage Multipliers;32
5.2.4;2.2.4 Modified Dickson Voltage Multipliers;35
5.2.5;2.2.5 Mandal-Sarpeshkar Voltage Multiplier;36
5.2.6;2.2.6 Voltage Multiplier with VT -Cancellation;37
5.2.7;2.2.7 Bergeret Voltage Multiplier;39
5.3;2.3 Power-Matching and Gain-Boosting Using LC Tanks;40
5.4;2.4 Power-Matching and Gain-Boosting UsingTransformers;51
5.5;2.5 Chapter summary;64
6;Chapter 3 DATA ENCODING;67
6.1;3.1 Non-Return-to-Zero Encoding;69
6.2;3.2 Return-to-Zero Encoding;70
6.3;3.3 Manchester Encoding;71
6.4;3.4 Miller Encoding;72
6.5;3.5 Miller-Modulated Sub-carrier Encoding;73
6.6;3.6 FM0 Encoding;74
6.7;3.7 Pulse Interval Encoding;74
6.8;3.8 Chapter Summary;75
7;Chapter 4 MODULATORS AND DEMODULATORS;78
7.1;4.1 Basic Modulation Schemes;79
7.1.1;4.1.1 Amplitude Shift Keying;79
7.1.2;4.1.2 Frequency Shift Keying;81
7.1.3;4.1.3 Phase Shift Keying;83
7.2;4.2 ASK Modulators and Demodulators;83
7.2.1;4.2.1 ASK Modulators;84
7.2.2;4.2.2 Classif cation of ASK Demodulators;84
7.2.3;4.2.3 Design Challenges of ASK Demodulators;85
7.2.4;4.2.4 Voltage-Mode ASK Demodulators;95
7.2.5;4.2.5 Current-Mode ASK Demodulators;102
7.2.6;4.2.6 Mixed-Mode ASK Demodulators;104
7.2.7;4.2.7 Performance Comparison of ASK Demodulators;111
7.3;4.3 FSK Modulators and Demodulator;111
7.3.1;4.3.1 FSK Modulators;113
7.3.2;4.3.2 Ghovanloo-Najaf FSK Demodulator;114
7.3.3;4.3.3 Jung FSK Demodulator;115
7.3.4;4.3.4 Weng FSK Demodulator;117
7.3.5;4.3.5 Performance Comparison of FSK Demodulators;119
7.4;4.4 PSK Modulators and Demodulators;119
7.4.1;4.4.1 PSK Modulators;120
7.4.2;4.4.2 Coherent BPSK Demodulators;121
7.4.3;4.4.3 Non-Coherent BPSK Demodulators;126
7.4.4;4.4.4 Performance Comparison of PSK Demodulators;129
7.5;4.5 Chapter Summary;130
8;Chapter 5 LOW-POWER PRECISION VOLTAGEREFERENCES;134
8.1;5.1 Characterization of Voltage References;134
8.1.1;5.1.1 Temperature Coeff cient;135
8.1.2;5.1.2 Power Supply Rejection Ratio;136
8.1.3;5.1.3 Minimum Supply Voltage;136
8.2;5.2 Temperature Characteristics of MOS Devices;137
8.2.1;5.2.1 Base-Emitter Voltage of BJTs;137
8.2.2;5.2.2 Threshold Voltage of MOSFETs;144
8.2.3;5.2.3 Gate-Source Voltage of MOSFETs in Weak Inversion;145
8.2.4;5.2.4 Resistance of Diffusion and Poly Resistors;149
8.2.5;5.2.5 PTAT Voltage / Current Generators;150
8.2.6;5.2.6 Zero-Temperature-Coeffcient Bias Point;152
8.3;5.3 First-Order Voltage References;153
8.3.1;5.3.1 Widlar Voltage Reference;155
8.3.2;5.3.2 Banba Voltage Reference;158
8.3.3;5.3.3 Waltari-Halonen Voltage Reference;159
8.3.4;5.3.4 Jiang-Lee Voltage Reference;160
8.3.5;5.3.5 Threshold Voltage Based Voltage References;161
8.3.6;5.3.6 Buck Voltage Reference;163
8.3.7;5.3.7 Comparison of First-Order Voltage References;165
8.4;5.4 High-Order Voltage References;166
8.4.1;5.4.1 Piecewise-Linear Voltage Reference;167
8.4.2;5.4.2 Malcovati Voltage Reference;167
8.4.3;5.4.3 Resistor Curvature-CompensatedVoltage Reference;170
8.4.4;5.4.4 Ker-Chen Voltage Reference;172
8.4.5;5.4.5 Comparison of High-Order Voltage References;174
8.5;5.5 Sub-threshold Voltage References;174
8.5.1;5.5.1 Ytterdal Voltage Reference;175
8.5.2;5.5.2 Cheng-Wu Voltage Reference;177
8.5.3;5.5.3 Huang Voltage Reference;178
8.5.4;5.5.4 Ueno Voltage Reference;180
8.5.5;5.5.5 De Vita - Iannaccone Voltage Reference;181
8.5.6;5.5.6 Sub-threshold Voltage References Without Amplifers;183
8.5.7;5.5.7 Comparison of Sub-Threshold Voltage References;186
8.6;5.6 Chapter Summary;187
9;Chapter 6 CLOCK GENERATION AND CALIBRATION;190
9.1;6.1 Clock Generation From Carrier;191
9.2;6.2 Clock Generation From Envelope;194
9.3;6.3 Clock Generation Using Carrier Injection-Locking;196
9.4;6.4 Clock Generation Using Digital Trimming;198
9.5;6.5 Clock Generation Using Phase-Locked Loops;200
9.6;6.6 Clock Generation Using Frequency-Locked Loop;202
9.7;6.7 Clock Generation Using Envelope Injection-Locking;203
9.8;6.8 Performance Comparison;215
9.9;6.9 Chapter Summary;215
10;Chapter 7 LOW-POWER ANALOG-TO-DIGITALCONVERTERS;218
10.1;7.1 Fundamentals of Analog-to-Digital Converters;219
10.1.1;7.1.1 Quantization Error;220
10.1.2;7.1.2 Offset Error;222
10.1.3;7.1.3 Gain Error;222
10.1.4;7.1.4 Differential Nonlinearity;222
10.1.5;7.1.5 Integral Nonlinearity;223
10.1.6;7.1.6 Dynamic Range;223
10.1.7;7.1.7 Signal-to-Noise Ratio;225
10.1.8;7.1.8 Signal-to-Noise-and-Distortion Ratio;225
10.1.9;7.1.9 Effective Number of Bits;226
10.2;7.2 Integrating ADCs;226
10.2.1;7.2.1 Single-Slope Integrating ADCs;226
10.2.2;7.2.2 Dual-Slope Integrating ADCs;228
10.3;7.3 Oscillator-Based Temperature ADCs;230
10.3.1;7.3.1 Relaxation Oscillator-Based Temperature ADCs;230
10.3.2;7.3.2 Ring Oscillator-Based Temperature ADCs;232
10.4;7.4 Time-to-Digital Converter Based Temperature ADCs;236
10.5;7.5 Frequency-to-Digital Converter Based TemperatureADCs;240
10.6;7.6 Charge Redistribution Successive ApproximationADCs;240
10.6.1;7.6.1 Charge-Scaling DACs;241
10.6.2;7.6.2 Accuracy of Charge-Scaling DACs;245
10.6.3;7.6.3 Charge Redistribution ADCs;247
10.6.4;7.6.4 Single-Stage Binary-Weighted Capacitor Arrays;250
10.6.5;7.6.5 Two-Stage Binary-Weighted Capacitor Array;252
10.6.6;7.6.6 C-2C Capacitor Arrays;262
10.6.7;7.6.7 Switching Network;268
10.6.8;7.6.8 Hybrid Charge-Scaling DACs;269
10.6.9;7.6.9 Multi-Stage Charge-Scaling DACs;269
10.7;7.7 Performance Comparison;270
10.8;7.8 Chapter Summary;272
11;Appendix A Material and Physical Constants;273
12;References;274
13;Index;290
14;About the Author;294