Buch, Englisch, 334 Seiten, Format (B × H): 167 mm x 242 mm, Gewicht: 746 g
ISBN: 978-0-387-26049-5
Verlag: Springer Us
SystemVerilog language consists of three categories of features -- Design, Assertions and Testbench. Assertions add a whole new dimension to the ASIC verification process. Engineers are used to writing testbenches in verilog that help verify their design. Verilog is a procedural language and is very limited in capabilities to handle the complex ASICs built today. SystemVerilog assertions (SVA) is a declarative language. The temporal nature of the language provides excellent control over time and allows mulitple processes to execute simultaneously. This provides the engineers a very strong tool to solve their verification problems. The language is still new and the thinking is very different from the user's perspective when compared to standard verilog language. There is not enough expertise or intellectual property available as of today in the field. While the language has been defined very well, there is no practical guide that shows how to use the language to solve real verification problems. This book is a practical guide that will help people to understand this new language and adopt assertion based verification methodology quickly.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
- Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines
- Mathematik | Informatik EDV | Informatik Technische Informatik Hochleistungsrechnen, Supercomputer
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf
- Technische Wissenschaften Energietechnik | Elektrotechnik Elektrotechnik
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
Weitere Infos & Material
Assertion Based Verification.- to SVA.- SVA Simulation Methodology.- SVA for Finite State Machines.- SVA for Data Intensive Designs.- SVA for Memories.- SVA for Protocol Interface.- Checking the Checker.
