Architectures for RF Frequency Synthesizers

Softcover Nachdruck of the original 1. Auflage 2002
ISBN: 978-1-4419-5293-6
Verlag: Springer US

Buch, Englisch, Band 693, 250 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 429 g

Reihe: The Springer International Series in Engineering and Computer Science

Frequency synthesizers are an essential building block of RF communication products. They can be found in traditional consumer products, in personal communication systems, and in optical communication equipment. Since frequency synthesizers are used in many different applications, different performance aspects may need to be considered in each case. The main body of the text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. The analysis of the PLL properties is performed with the use of the open-loop bandwidth and phase margin concepts, to enable the influence of higher-order poles to be taken into account from the beginning of the design process. The theoretical system analysis is complemented by descriptions of innovative system and building block architectures, by circuit implementations in bipolar and CMOS technologies, and by measurement results. Architectures for RF Frequency Synthesizers contains basic information for the beginner as well as in-depth knowledge for the experienced designer. It is widely illustrated with practical design examples used in industrial products.

Zielgruppe

Research

Autoren/Hrsg.

Vaucher, Cicero S.

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Technische Wissenschaften Elektronik | Nachrichtentechnik Nachrichten- und Kommunikationstechnik Funktechnik

Inhaltsverzeichnis

Tuning System Specifications.- Single-Loop Architectures.- Wide-Band Tuning System Architectures.- Adaptive PLL Architecture Combining High Spectral Purity and Fast Settling Time.- Architecture and Circuit Design of Programmable Dividers.- Conclusions.