Test and Diagnosis for Small-Delay Defects

2012
ISBN: 978-1-4899-8952-9
Verlag: Springer

Buch, Englisch, 212 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 359 g

This book will introduce new techniques for detecting and diagnosing small-delay defects in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise.

Zielgruppe

Research

Autoren/Hrsg.

Tehranipoor, Mohammad

Chakrabarty, Krishnendu

Peng, Ke

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Halb- und Supraleitertechnologie
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren

Inhaltsverzeichnis

Introduction to VLSI Testing.- Delay Test and System-Delay Defects.- Long Path-Based Hybrid Method.- Process Variations- and Crosstalk-Aware Pattern Selection.- Power Supply Noise- and Crosstalk-Aware Hybrid Method.- SDD-Based Hybrid Method.- Maximizing Crosstalk Effect on Critical Paths.- Maximizing Power Supply Noise on Critical Paths.- Faster-than-at-speed Test.- Introduction to Diagnosis.- Diagnosing Noise-Induced SDDs by Using Dynamic SDF. 

Über Autor(innen)

This book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise.
 
This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations, power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is caused by PSN, crosstalk, or a combination of these two effects.

• Provides an introduction to VLSI testing and diagnosis, with a focus on delay testing and small-delay defects;
• Presents the most effective techniques for screening small-delay defects, such as long path-based, slack-based, critical fault-based, and noise-aware methodologies;
• Shows readers to use timing information for small-delay defect diagnosis, in order to increase the resolution of their current diagnosis flow.