Srivastava Completion Detection in Asynchronous Circuits
1. Auflage 2022
ISBN: 978-3-031-18397-3
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
Toward Solution of Clock-Related Design Challenges
E-Book, Englisch, 119 Seiten
Reihe: Computer Science (R0)
ISBN: 978-3-031-18397-3
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
Introduction to asynchronous circuit design.- "Preliminary considerations for asynchronous circuit design.".- "Completion detection schemes for asynchronous design style".- Case Studies: Barrel shifter and binary adders.- "Generic Architecture of deterministic completion detection scheme".- Architecture optimization using deterministic completion detection".- Simulations.




