System-Level Design Techniques for Energy-Efficient Embedded Systems

2004
ISBN: 978-1-4419-5429-9
Verlag: Springer US

Buch, Englisch, 194 Seiten, Previously published in hardcover, Format (B × H): 160 mm x 240 mm, Gewicht: 347 g

System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

Zielgruppe

Research

Autoren/Hrsg.

Schmitz, Marcus T.

Eles, Petru

Al-Hashimi, Bashir M.

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren

Inhaltsverzeichnis

Background.- Power Variation-Driven Dynamic Voltage Scaling.- Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling.- Energy-Efficient Multi-mode Embedded Systems.- Dynamic Voltage Scaling for Control Flow-Intensive Applications.- LOPOCOS: A Prototype Low Power Co-Synthesis Tool.- Conclusion.