Ou / Prasanna Energy Efficient Hardware-Software Co-Synthesis Using Reconfigurable Hardware

1. Auflage 2010
ISBN: 978-1-58488-742-3
Verlag: Taylor & Francis
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)

E-Book, Englisch, 224 Seiten

Reihe: Chapman & Hall/CRC Computer & Information Science Series

Rapid energy estimation for energy efficient applications using field-programmable gate arrays (FPGAs) remains a challenging research topic. Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems, where energy efficiency is a key performance metric. Helping overcome these challenges, Energy Efficient Hardware-Software Co-Synthesis Using Reconfigurable Hardware offers solutions for the development of energy efficient applications using FPGAs.

The book integrates various high-level abstractions for describing hardware and software platforms into a single, consistent application development framework, enabling users to construct, simulate, and debug systems. Based on these high-level concepts, it proposes an energy performance modeling technique to capture the energy dissipation behavior of both the reconfigurable hardware platform and the target applications running on it. The authors also present a dynamic programming-based algorithm to optimize the energy performance of an application running on a reconfigurable hardware platform. They then discuss an instruction-level energy estimation technique and a domain-specific modeling technique to provide rapid and fairly accurate energy estimation for hardware-software co-designs using reconfigurable hardware. The text concludes with example designs and illustrative examples that show how the proposed co-synthesis techniques lead to a significant amount of energy reduction.

This book explores the advantages of using reconfigurable hardware for application development and looks ahead to future research directions in the field. It outlines the range of aspects and steps that lead to an energy efficient hardware-software application synthesis using FPGAs.

Zielgruppe

Computer scientists, electrical engineers, and applied mathematicians.

Autoren/Hrsg.

Ou, Jingzhao

Prasanna, Viktor K.

Fachgebiete

• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur
• Technische Wissenschaften Elektronik | Nachrichtentechnik Nachrichten- und Kommunikationstechnik

Inhaltsverzeichnis

Introduction
Overview
Challenges and Contributions
Manuscript Organization

Reconfigurable Hardware
Reconfigurable System-on-Chips (RSoCs)
Design Flows

A High-Level Hardware-Software Application Development Framework
Introduction
Related Work
Our Approach
An Implementation Based on MATLAB/Simulink
Illustrative Examples
Summary

Energy Performance Modeling and Energy Efficient Mapping for a Class of Applications
Introduction
Knobs for Energy Efficient Designs
Related Work
Performance Modeling of RSoC Architectures
Problem Formulation
Algorithm for Energy Minimization
Illustrative Examples
Summary

High-Level Rapid Energy Estimation and Design Space Exploration
Introduction
Related Work
Domain-Specific Modeling
A Two-Step Rapid Energy Estimation Technique
Energy Estimation for Customized Hardware Components
Instruction-Level Energy Estimation for Software Programs
Illustrative Examples
Summary

Hardware-Software Co-Design for Energy Efficient Implementations of Operating Systems
Introduction
Real-Time Operating Systems
On-Chip Energy Management Mechanisms
Related Work
Our Approach
An Implementation Based on MicroC/OS-II
An Implementation Based on TinyOS
Summary
Concluding Remarks and Future Directions
Concluding Remarks
Future Work
References

Über Autor(innen)

Jingzhao Ou works for the DSP Design Tools and Methodologies Group at Xilinx in San Jose, California.
Viktor K. Prasanna is the Charles Lee Powell Chair in Engineering and professor of electrical engineering and computer science at the University of Southern California.