Buch, Englisch, Band 116, 95 Seiten, Previously published in hardcover, Format (B × H): 156 mm x 234 mm, Gewicht: 1825 g
Buch, Englisch, Band 116, 95 Seiten, Previously published in hardcover, Format (B × H): 156 mm x 234 mm, Gewicht: 1825 g
Reihe: Analog Circuits and Signal Processing
ISBN: 978-1-4939-4801-7
Verlag: Springer
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.