Mitzner Complete PCB Design Using OrCAD Capture and PCB Editor

1. Auflage 2009
ISBN: 978-0-08-094354-1
Verlag: Elsevier Science & Techn.
Format: EPUB
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)

E-Book, Englisch, 488 Seiten

This book provides instruction on how to use the OrCAD design suite to design and manufacture printed circuit boards. The primary goal is to show the reader how to design a PCB using OrCAD Capture and OrCAD Editor. Capture is used to build the schematic diagram of the circuit, and Editor is used to design the circuit board so that it can be manufactured.

The book is written for both students and practicing engineers who need in-depth instruction on how to use the software, and who need background knowledge of the PCB design process.
KEY FEATURES:
* Beginning to end coverage of the printed circuit board design process. Information is presented in the exact order a circuit and PCB are designed
* Over 400 full color illustrations, including extensive use of screen shots from the software, allow readers to learn features of the product in the most realistic manner possible
* Straightforward, realistic examples present the how and why the designs work, providing a comprehensive toolset for understanding the OrCAD software
* Introduces and follows IEEE, IPC, and JEDEC industry standards for PCB design.
* Unique chapter on Design for Manufacture covers padstack and footprint design, and component placement, for the design of manufacturable PCB's.
*FREE CD containing the OrCAD demo version and design files

Autoren/Hrsg.

Mitzner, Kraig

Inhaltsverzeichnis

1;FRONT COVER;1
2;COMPLETE PCB DESIGN USING ORCAD® CAPTURE AND PCB EDITOR;4
3;COPYRIGHT PAGE;5
4;CONTENTS;6
5;INTRODUCTION;12
6;ACKNOWLEDGMENTS;16
7;CHAPTER 1 Introduction to PCB Design and CAD;18
7.1;Computer-Aided Design and the OrCAD Design Suite;18
7.2;Printed Circuit Board Fabrication;19
7.2.1;PCB Cores and Layer Stack-Up;19
7.2.2;PCB Fabrication Process;21
7.2.3;Photolithography and Chemical Etching;22
7.2.4;Mechanical Milling;24
7.2.5;Layer Registration;24
7.3;Function of OrCAD PCB Editor in the PCB Design Process;26
7.4;Design Files Created by PCB Editor;29
7.4.1;PCB Editor Format Files;29
7.4.2;Artwork (Gerber) Files;29
7.4.3;PCB Assembly Layers and Files;30
8;CHAPTER 2 Introduction to the PCB Design Flow by Example;32
8.1;Overview of the Design Flow;32
8.1.1;Creating a Circuit Design with Capture;32
8.2;Designing the PCB with PCB Editor;39
8.2.1;The PCB Editor Window;39
8.2.2;Drawing the Board Outline;41
8.2.3;Placing Parts;42
8.2.4;Moving and Rotating Parts;42
8.2.5;Routing the Board;44
8.2.6;Creating Artwork for Manufacturing;48
9;CHAPTER 3 Project Structures and the PCB Editor Tool Set;50
9.1;Project Setup and Schematic Entry Details;50
9.1.1;Capture Projects Explained;50
9.1.2;Capture Part Libraries Explained;53
9.2;Understanding the PCB Editor Environment and Tool Set;55
9.2.1;Terminology;55
9.2.2;PCB Editor Windows and Tools;56
9.2.3;The Design Window;56
9.2.4;The Toolbar Groups;56
9.2.5;Control Panel with Foldable Window Panes;61
9.2.6;Command Window Pane;63
9.2.7;WorldView Window Pane;64
9.2.8;Status Bar;64
9.2.9;Color and Visibility Dialog Box;65
9.2.10;Layout Cross Section (Layer Stack-Up) Dialog Box;65
9.2.11;Constraint Manager;65
9.2.12;Manufacturing Artwork and Drill Files;69
9.2.13;Understanding the Documentation Files;71
10;CHAPTER 4 Introduction to Industry Standards;74
10.1;Introduction to the Standards Organizations;75
10.1.1;Institute for Printed Circuits (IPC—Association Connecting Electronics Industries);75
10.1.2;Electronic Industries Alliance (EIA);75
10.1.3;Joint Electron Device Engineering Council (JEDEC);76
10.1.4;International Engineering Consortium (IEC);76
10.1.5;Military Standards;76
10.1.6;American National Standards Institute (ANSI);76
10.1.7;Institute of Electrical and Electronics Engineers (IEEE);77
10.2;Classes and Types of PCBs;77
10.2.1;Performance Classes;77
10.2.2;Producibility Levels;78
10.2.3;Fabrication Types and Assembly Subclasses;78
10.2.4;IPC Land Pattern Density Levels;79
10.3;Introduction to Standard Fabrication Allowances;79
10.3.1;Registration Tolerances;79
10.3.2;Breakout and Annular Ring Control;79
10.4;PCB Dimensions and Tolerances;80
10.4.1;Standard Panel Sizes;80
10.4.2;Tooling Area Allowances and Effective Panel Usage;81
10.4.3;Standard Finished PCB Thickness;81
10.4.4;Core Thickness;82
10.4.5;Prepreg Thickness;82
10.4.6;Copper Thickness for PTHs and Vias;83
10.4.7;Copper Cladding/Foil Thickness;83
10.5;Copper Trace and Etching Tolerances;84
10.6;Standard Hole Dimensions;85
10.7;Soldermask Tolerance;86
10.8;References;86
10.9;Suggested Reading;87
10.10;Other Items of Interest;87
11;CHAPTER 5 Introduction to Design for Manufacturing;88
11.1;Introduction to PCB Assembly and Soldering Processes;88
11.1.1;Assembly Processes;88
11.1.2;Soldering Processes;90
11.2;Component Placement and Orientation Guide;94
11.2.1;Component Spacing for Through-Hole Devices;95
11.2.2;Component Spacing for Surface-Mounted Devices;95
11.2.3;Mixed THD and SMD Spacing Requirements;99
11.3;Footprint and Padstack Design for PCB Manufacturability;99
11.3.1;Land Patterns for Surface-Mounted Devices;101
11.3.2;Land Patterns for Through-Hole Devices;107
11.4;References;113
12;CHAPTER 6 PCB Design for Signal Integrity;114
12.1;Circuit Design Issues Not Related to PCB Layout;114
12.1.1;Noise;114
12.1.2;Distortion;115
12.1.3;Frequency Response;116
12.2;Issues Related to PCB Layout;116
12.2.1;Electromagnetic Interference and Cross Talk;116
12.2.2;Magnetic Fields and Inductive Coupling;117
12.2.3;Loop Inductance;120
12.2.4;Electric Fields and Capacitive Coupling;122
12.3;Ground Planes and Ground Bounce;123
12.3.1;What Ground Is and What It Is Not;123
12.3.2;Ground (Return) Planes;127
12.3.3;Ground Bounce and Rail Collapse;127
12.3.4;Split Power and Ground Planes;129
12.4;PCB Electrical Characteristics;131
12.4.1;Characteristic Impedance;131
12.4.2;Reflections;136
12.4.3;Ringing;141
12.4.4;Electrically Long Traces;142
12.4.5;Critical Length;146
12.4.6;Transmission Line Terminations;146
12.5;PCB Routing Topics;149
12.5.1;Parts Placement for Electrical Considerations;149
12.5.2;PCB Layer Stack-Up;150
12.5.3;Bypass Capacitors and Fan-Out;154
12.5.4;Trace Width for Current-Carrying Capability;155
12.5.5;Trace Width for Controlled Impedance;156
12.5.6;Trace Spacing for Voltage Withstanding;166
12.5.7;Trace Spacing to Minimize Cross Talk (3w Rule);166
12.5.8;Traces with Acute and 90° Angles;167
12.6;Using PSpice to Simulate Transmission Lines;169
12.6.1;Simulating Digital Transmission Lines;170
12.6.2;Simulating Analog Signals;173
12.7;References;173
12.8;Numbered References;174
13;CHAPTER 7 Making and Editing Capture Parts;176
13.1;The Capture Part Libraries;176
13.2;Types of Packaging;177
13.2.1;Homogeneous Parts;177
13.2.2;Heterogeneous Parts;177
13.2.3;Pins;178
13.3;Part Editing Tools;179
13.3.1;The Select Tool and Settings;179
13.3.2;The Pin Tools;179
13.3.3;The Graphics Tools;180
13.3.4;The Zoom Tools;180
13.4;Methods of Constructing Capture Parts;181
13.4.1;Method 1. Constructing Parts Using the New Part Option (Design Menu);181
13.4.2;Method 2. Constructing Parts with Capture Using the Design Spreadsheet;193
13.4.3;Method 3. Constructing Parts Using Generate Part from the Tools Menu;196
13.4.4;Method 4. Generating Parts with the PSpice Model Editor;197
13.5;Constructing Capture Symbols;211
14;CHAPTER 8 Making and Editing Footprints;214
14.1;Introduction to PCB Editor's Symbols Library;214
14.1.1;Symbol Types;215
14.2;Composition of a Footprint;216
14.2.1;Padstacks;217
14.2.2;Graphical Objects;218
14.2.3;Text;219
14.2.4;Minimum Footprint Requirements;219
14.2.5;Optional Footprint Objects;219
14.3;Introduction to the Padstack Designer;220
14.3.1;Padstack Designer Parameters Tab;220
14.3.2;Padstack Designer Layers Tab;221
14.4;Footprint Design Examples;222
14.4.1;Example 1. Design of a Through-Hole Device from Scratch;223
14.4.2;Example 2. Design of Surface-Mount Device from an Existing Symbol;229
14.4.3;Example 3. PGA Design Using the Symbol Wizard;233
14.5;Flash Symbols for Thermal Reliefs;236
14.6;Mechanical Symbols;239
14.6.1;Mounting Holes;240
14.6.2;Creating Mechanical Drawings;242
14.6.3;Placing Mechanical Symbols on a Board Design;243
14.7;Blind, Buried, and Microvias;244
14.8;Using the IPC-7351 Land Pattern Viewer;246
14.9;References;249
15;CHAPTER 9 PCB Design Examples;250
15.1;Introduction;250
15.2;Overview of the Design Flow;251
15.3;Example 1. Dual Power Supply, Analog Design;253
15.3.1;Initial Design Concept and Preparation;254
15.3.2;Setting Up the Project in Capture;255
15.3.3;Preparing the Design for PCB Editor;262
15.3.4;Setting Up the Board;270
15.3.5;Design Rule Check and Status;293
15.3.6;Defining the Layer Stack-Up;295
15.3.7;Pouring Copper Planes;299
15.3.8;Verifying Connectivity between Pins and Planes;302
15.3.9;Defining Trace Width and Spacing Rules;306
15.3.10;Prerouting the Board;309
15.3.11;Manually Routing Traces;312
15.3.12;Finalizing the Design;315
15.4;Example 2. Mixed Analog/Digital Design Using Split Power, Ground Planes;321
15.4.1;Mixed-Signal Circuit Design in Capture;321
15.4.2;Defining the Layer Stack-Up for Split Planes;327
15.4.3;Setting Up Routing Constraints;333
15.4.4;Adding Ground Planes to Routing Layers;339
15.5;Example 3. Multipage, Multipower, and Multiground Mixed A/D PCB Design with PSpice;343
15.5.1;Introduction;343
15.5.2;Multiplane Layer Methodologies;344
15.5.3;Capture Project Setup for PSpice Simulation and Board Design;347
15.5.4;Designing the Board with PCB Editor;357
15.5.5;Assigning Vias to Nets;365
15.5.6;Alternate Methods of Connecting Separate Ground Planes;371
15.6;Example 4. High-Speed Digital Design;375
15.6.1;Layer Setup for Microstrip Transmission Lines;377
15.6.2;Constructing a Heat Spreader with Copper Pours and Vias;379
15.6.3;Determining Critical Trace Length of Transmission Lines;386
15.6.4;Moated Ground Areas for Clock Circuits;390
15.6.5;Gate and Pin Swapping;392
15.6.6;Using Swap Options;394
15.6.7;Using the Autoswap Option;397
15.7;Positive Planes;400
15.7.1;Positive Plane Artwork Production;406
15.7.2;Positive vs. Negative Plane File Sizes;406
15.7.3;Pros and Cons of Using Positive vs. Negative Planes;406
15.8;Design Templates;408
15.8.1;Making a Custom Capture Template;408
15.8.2;Making a Custom PCB Editor Board Template;408
15.8.3;Making a Custom PCB Editor Technology Template;409
15.9;Using the Board Wizard;410
15.10;Moving on to Manufacturing;413
15.11;References;413
16;CHAPTER 10 Artwork Development and Board Fabrication;416
16.1;Schematic Design in Capture;416
16.2;The Board Design with PCB Editor;417
16.2.1;Routing the Board;417
16.2.2;Placing Mechanical Symbols;419
16.2.3;Generating Manufacturing Data;422
16.2.4;Generating the Artwork Files;422
16.2.5;Generating Drill Files;432
16.2.6;Generating Route Path Files;434
16.2.7;Generating the Route File;436
16.2.8;Verifying the Artwork;437
16.3;Using CAD Tools to 3-D Model the PCB Design;438
16.4;Fabricating the Board;440
16.4.1;Receipt Inspection and Testing;442
16.5;Generating Pick and Place Files;442
16.6;References;445
17;APPENDICES;446
17.1;APPENDIX A. List of Design Standards;448
17.2;APPENDIX B. Partial List of Packages and Footprints and Some of the Footprints Included in OrCAD Layout;450
17.3;APPENDIX C. Rise and Fall Times for Various Logic Families;464
17.4;APPENDIX D. Drill and Screw Dimensions;466
17.5;APPENDIX E. References by Subject;468
18;INDEX;484
18.1;A;484
18.2;B;484
18.3;C;484
18.4;D;484
18.5;E;485
18.6;F;485
18.7;G;485
18.8;H;485
18.9;I;485
18.10;J;485
18.11;K;485
18.12;L;485
18.13;M;486
18.14;N;486
18.15;O;486
18.16;P;486
18.17;Q;486
18.18;R;486
18.19;S;487
18.20;T;487
18.21;U;487
18.22;V;487
18.23;W;488
18.24;X;488
18.25;Y;488
18.26;Z;488