Marwedel Embedded System Design

Embedded Systems Foundations of Cyber-Physical Systems
2. Auflage 2011
ISBN: 978-94-007-0257-8
Verlag: Springer Netherlands
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 400 Seiten

Reihe: Embedded Systems

Until the late 1980s, information processing was associated with large mainframe computers and huge tape drives. During the 1990s, this trend shifted toward information processing with personal computers, or PCs. The trend toward miniaturization continues and in the future the majority of information processing systems will be small mobile computers, many of which will be embedded into larger products and interfaced to the physical environment. Hence, these kinds of systems are called embedded systems. Embedded systems together with their physical environment are called cyber-physical systems. Examples include systems such as transportation and fabrication equipment. It is expected that the total market volume of embedded systems will be significantly larger than that of traditional information processing systems such as PCs and mainframes. Embedded systems share a number of common characteristics. For example, they must be dependable, efficient, meet real-time constraints and require customized user interfaces (instead of generic keyboard and mouse interfaces). Therefore, it makes sense to consider common principles of embedded system design.Embedded System Design starts with an introduction into the area and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, like real-time operating systems. The book also discusses evaluation and validation techniques for embedded systems. Furthermore, the book presents an overview of techniques for mapping applications to execution platforms. Due to the importance of resource efficiency, the book also contains a selected set of optimization techniques for embedded systems, including special compilation techniques. The book closes with a brief survey on testing.Embedded System Design can be used as a text book for courses on embedded systems and as a source which provides pointers to relevant material in the area for PhD students and teachers. It assumes a basic knowledge of information processing hardware and software. Courseware related to this book is available at http://ls12-www.cs.tu-dortmund.de/-marwedel.

Dr. Peter Marwedel received his PhD in Physics from the University of Kiel in 1974. He is one of the early researchers in high level synthesis, working on the MIMOLA system for a number of years. Dr. Marwedel is a professor at the University of Dortmund since 1989. He has served as the chairman of the computer science department, has played a leading role in establishing the Design, Automation and Test in Europe (DATE) conference and is the chairman of the Informatik Centrum Dortmund (ICD), a technology transfer centre.

Autoren/Hrsg.

Marwedel, Peter

Inhaltsverzeichnis

1;Contents;5
2;Preface;10
3;Acknowledgments;20
4; Introduction;21
4.1;Application areas and examples;21
4.2;Common characteristics;24
4.3;Challenges in Embedded System Design;30
4.4;Design Flows;32
4.5;Structure of this book;37
4.6;Assignments;38
5; Specifications and Modeling;40
5.1;Requirements;40
5.2;Models of computation;47
5.3;Early design phases;54
5.3.1;Use cases;54
5.3.2;(Message) Sequence Charts;55
5.4;Communicating finite state machines (CFSMs);58
5.4.1;Timed automata;59
5.4.2;StateCharts: implicit shared memory communication;61
5.4.3;Synchronous languages;71
5.4.4;SDL: A case of message passing;73
5.5;Data flow;80
5.5.1;Scope;80
5.5.2;Kahn process networks;81
5.5.3;Synchronous data flow;83
5.5.4;Simulink;85
5.6;Petri nets;86
5.6.1;Introduction;86
5.6.2;Condition/event nets;89
5.6.3;Place/transition nets;90
5.6.4;Predicate/transition nets;95
5.6.5;Evaluation;97
5.7;Discrete event based languages;97
5.7.1;VHDL;99
5.7.2;SystemC;115
5.7.3;Verilog and SystemVerilog;117
5.7.4;SpecC;119
5.8;Von-Neumann languages;120
5.8.1;CSP;121
5.8.2;ADA;121
5.8.3;Java;124
5.8.4;Pearl and Chill;125
5.8.5;Communication libraries;125
5.9;Levels of hardware modeling;126
5.10;Comparison of models of computation;128
5.10.1;Criteria;128
5.10.2;UML;132
5.10.3;Ptolemy II;134
5.11;Assignments;135
6; Embedded System Hardware;138
6.1;Introduction;138
6.2;Input;139
6.2.1;Sensors;139
6.2.2;Discretization of time: Sample-and-hold circuits;142
6.2.3;Discretization of values: A/D-converters;146
6.3;Processing Units;151
6.3.1;Overview;151
6.3.2;Application-Specific Circuits (ASICs);154
6.3.3;Processors;154
6.3.4;Reconfigurable Logic;171
6.4;Memories;174
6.5;Communication;176
6.5.1;Requirements;177
6.5.2;Electrical robustness;178
6.5.3;Guaranteeing real-time behavior;179
6.5.4;Examples;181
6.6;Output;183
6.6.1;D/A-converters;183
6.6.2;Sampling theorem;186
6.6.3;Actuators;191
6.7;Secure hardware;192
6.8;Assignments;192
7; System Software;195
7.1;Embedded Operating Systems;196
7.1.1;General requirements;196
7.1.2;Real-time operating systems;200
7.1.3;Virtual machines;204
7.1.4;Resource access protocols;204
7.2;ERIKA;209
7.3;Hardware abstraction layers;213
7.4;Middleware;213
7.4.1;OSEK/VDX COM;213
7.4.2;CORBA;214
7.4.3;MPI;215
7.4.4;POSIX Threads (Pthreads);216
7.4.5;OpenMP;216
7.4.6;UPnP, DPWS and JXTA;217
7.5;Real-time databases;218
7.6;Assignments;219
8; Evaluation and Validation;220
8.1;Introduction;220
8.1.1;Scope;220
8.1.2;Multi-objective optimization;221
8.1.3;Relevant objectives;223
8.2;Performance evaluation;224
8.2.1;Early phases;224
8.2.2;WCET estimation;225
8.2.3;Real-time calculus;230
8.3;Energy and power models;234
8.4;Thermal models;235
8.5;Risk- and dependability analysis;236
8.6;Simulation;245
8.7;Rapid prototyping and emulation;246
8.8;Formal Verification;248
8.9;Assignments;250
9; Application mapping;252
9.1;Problem definition;252
9.2;Scheduling in real-time systems;255
9.2.1;Classification of scheduling algorithms;255
9.2.2;Aperiodic scheduling without precedence constraints;259
9.2.3;Aperiodic scheduling with precedence constraints;265
9.2.4;Periodic scheduling without precedence constraints;274
9.2.5;Periodic scheduling with precedence constraints;279
9.2.6;Sporadic events;280
9.3;Hardware/software partitioning;280
9.3.1;Introduction;280
9.3.2;COOL;281
9.4;Mapping to heterogeneous multi-processors;289
9.5;Assignments;294
10; Optimization;297
10.1;Task level concurrency management;297
10.2;High-level optimizations;301
10.2.1;Floating-point to fixed-point conversion;301
10.2.2;Simple loop transformations;303
10.2.3;Loop tiling/blocking;305
10.2.4;Loop splitting;307
10.2.5;Array folding;309
10.3;Compilers for embedded systems;311
10.3.1;Introduction;311
10.3.2;Energy-aware compilation;312
10.3.3;Memory-architecture aware compilation;313
10.3.4;Reconciling compilers and timing analysis;322
10.3.5;Compilation for digital signal processors;324
10.3.6;Compilation for multimedia processors;326
10.3.7;Compilation for VLIW processors;327
10.3.8;Compilation for network processors;328
10.3.9;Compiler generation, retargetable compilers and design space exploration;329
10.4;Power Management and Thermal Management;329
10.4.1;Dynamic voltage scaling (DVS);329
10.4.2;Dynamic power management (DPM);333
10.5;Assignments;334
11; Test;337
11.1;Scope;337
11.2;Test procedures;338
11.2.1;Test pattern generation for gate level models;338
11.2.2;Self-test programs;340
11.3;Evaluation of test pattern sets and system robustness;340
11.3.1;Fault coverage;340
11.3.2;Fault simulation;341
11.3.3;Fault injection;342
11.4;Design for testability;343
11.4.1;Motivation;343
11.4.2;Scan design;343
11.4.3;Signature analysis;345
11.4.4;Pseudo-random test pattern generation;346
11.4.5;The built-in logic block observer (BILBO);347
11.5;Assignments;348
12;Integer linear programming;350
13;Kirchhoff's laws and operational amplifiers;352
14;References;357
15;About the Author;386
16;List of Figures;387
17;Index;394