Buch, Englisch, 299 Seiten, Format (B × H): 161 mm x 240 mm, Gewicht: 1360 g
Buch, Englisch, 299 Seiten, Format (B × H): 161 mm x 240 mm, Gewicht: 1360 g
ISBN: 978-3-540-65445-2
Verlag: Springer Berlin Heidelberg
Hardware verification is a hot topic in circuit and system design due to rising circuit complexity. This advanced textbook presents an almost complete overview of techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. It enables the reader to understand the advantages and limitations of each technique. Each chapter contains an introduction and a summary as well as a section for the advanced reader. Thus a broad audience is addressed, from beginners in system design to experts.
Zielgruppe
Graduate
Autoren/Hrsg.
Fachgebiete
- Sozialwissenschaften Medien- und Kommunikationswissenschaften Kommunikationswissenschaften Digitale Medien, Internet, Telekommunikation
- Mathematik | Informatik EDV | Informatik Computerkommunikation & -vernetzung Internet, E-Mail, VoIP
- Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines
- Mathematik | Informatik EDV | Informatik Informatik Logik, formale Sprachen, Automaten
- Mathematik | Informatik EDV | Informatik Informatik Künstliche Intelligenz Wissensbasierte Systeme, Expertensysteme
Weitere Infos & Material
1 Introduction.- 2 Boolean Functions.- 3 Approaches Based on Finite State Machines.- 4 Propositional Temporal Logics.- 5 Higher-Order Logics.- Appendix A Mathematical Basics.- Appendix B Axioms and Rules for CTL*.- Appendix C Axioms and Rules for Higher Order Logic.- References.
