Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

1. Auflage. Softcover version of original hardcover Auflage 2006
ISBN: 978-90-481-7202-3
Verlag: Springer Netherlands

Buch, Englisch, 186 Seiten, Paperback, Format (B × H): 160 mm x 240 mm, Gewicht: 354 g

We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is required to cope with the rapidly increasing design costs. While the present paradigm change shares the move to a higher level of abstraction with all previous ones, there exists also a key difference. For the ?rst time shrinking geometries do not leadtoacorrespondingincreaseofperformance. InarecenttalkLisaSuofIBM pointed out that in 65nm technology only about 25% of performance increase can be attributed to scaling geometries while the lion share is due to innovative processor architecture [1]. We believe that this fact will revolutionize the entire semiconductor industry. What is the reason for the end of the traditional view of Moore’s law? It is instructive to look at the major drivers of the semiconductor industry: wireless communications and multimedia. Both areas are characterized by a rapidly increasingdemandofcomputationalpowerinordertoprocessthesophisticated algorithmsnecessarytooptimallyutilizethepreciousresourcebandwidth. The computational power cannot be provided by traditional processor architectures and shared bus type of interconnects. The simple reason for this fact is energy ef?ciency: there exist orders of magnitude between the energy ef?ciency of an algorithm implemented as a ?xed functionality computational element and of a software implementation on a processor.

Zielgruppe

Research

Autoren/Hrsg.

Kogel, Tim

Meyr, Heinrich

Leupers, Rainer

Fachgebiete

• Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Grafikprogrammierung
• Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
• Mathematik | Informatik EDV | Informatik Technische Informatik Systemverwaltung & Management
• Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering Objektorientierte Softwareentwicklung
• Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
• Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
• Geisteswissenschaften Design Produktdesign, Industriedesign
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Mathematik | Informatik EDV | Informatik Betriebssysteme Windows Betriebssysteme

Inhaltsverzeichnis

Foreword. Preface.- 1. Introduction.- 2. Embedded SOC Applications.- 3. Classification of Platform Elements.- 4. System Level Design Principles.- 5. Related Work.- 6. Methodology Overview.- 7. Unified Timing Model.- 8. MP-SOC Simulation Framework.- 9. Case Study.- 10. Summary.- Appendices. A: The OSCI TLM Standard. B: The OCPIP TL3 Channel. C: The Architects View Framework.- List of Figures. List of Tables. References.- Index.