E-Book, Englisch, 127 Seiten
Khalaf / Vidojkovic / Long Low-Power Millimeter Wave Transmitters for High Data Rate Applications
1. Auflage 2019
ISBN: 978-3-030-16653-3
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, 127 Seiten
Reihe: Signals and Communication Technology
ISBN: 978-3-030-16653-3
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
This book discusses low power techniques for millimeter wave transmitter IC. Considerations for the front-end design are followed by several implementation examples in the 60GHz band in CMOS down to 28nm technology. Additionally, the design and implementation details of digitally-modulated millimeter wave polar transmitters are presented.
Khaled Khalaf Khaled Khalaf obtained his Ph.D. in Electrical Engineering from Vrije Universiteit Brussel, Belgium in 2016. He works as a researcher at IMEC, Leuven, Belgium with interest on CMOS mm-wave circuits and systems for wireless applications with more emphasis on low-power transmitters for high datarate communication. Vojkan Vidojkovic Vojkan Vidojkovic received his PhD degree from the Eindhoven University of Technology in the Netherlands in 2007. He works as a technical staff member at Intel in Germany. John R. Long John R. Long has a Ph.D. degree in Electronics from Carleton University in Ottawa. He worked in industry for 12 years in the Advanced Technology Laboratory at Bell-Northern Research in Ottawa, and in January 2015 he was appointed Professor in Electrical and Computer Engineering at the University of Waterloo in Canada. His current research interests include low-power and broadband circuits for highly-integrated wireless transceivers, energy-efficient wireless sensors, mm-wave IC design, and electronics design for high-speed data communications. Piet Wambacq Piet Wambacq has a Ph.D. degree from the Katholieke Universiteit Leuven, Leuven, Belgium. He is a Principal Scientist at IMEC, Heverlee, Belgium, working on RF CMOS design for wireless applications. Since 2000 he is a Professor with the University of Brussels, Brussels, Belgium.
Autoren/Hrsg.
Weitere Infos & Material
1;Acknowledgements;6
2;Contents;7
3;Abbreviations;9
4;Nomenclature;11
5;List of Figures;12
6;List of Tables;19
7;1 Introduction;20
7.1;1.1 60GHz Operation;21
7.2;1.2 Phased Arrays;22
7.3;1.3 Link Budget;25
7.4;1.4 PA Power Back-Off;26
7.5;1.5 Organization of the Book;27
8;2 Design Considerations for High-Datarate Low-Power 60GHz TX Front-Ends;28
8.1;2.1 PA Considerations;28
8.1.1;2.1.1 Width Selection;28
8.1.2;2.1.2 Power Combining and Stacking;31
8.1.3;2.1.3 Balanced Operation;32
8.1.4;2.1.4 Cgd Neutralization;32
8.1.5;2.1.5 Deep Class-AB Operation;36
8.2;2.2 Output Matching Network;40
8.2.1;2.2.1 Topology Selection;40
8.2.2;2.2.2 Design Procedure;41
8.2.3;2.2.3 Layout Considerations;44
8.2.4;2.2.4 Effect on PA Performance;45
8.3;2.3 Multi-stage PA Design;47
8.4;2.4 Upconversion Mixer Design;50
9;3 60 GHz TX Front-Ends in Advanced CMOS Technologies with Improved Back-Off Efficiencies;54
9.1;3.1 A TX Front-End in 40 nm-LP CMOS with Three-Stage Class-AB PA;54
9.1.1;3.1.1 Circuit Description;54
9.1.2;3.1.2 Measurement Results;56
9.1.3;3.1.3 Conclusion;58
9.2;3.2 A 4-Antenna Path TX Front-End with Two-Stage Class-A/AB PA;59
9.2.1;3.2.1 Circuit Description;59
9.2.2;3.2.2 Measurement Results;61
9.2.3;3.2.3 Conclusion;66
9.3;3.3 A 28 nm-HPM TX Front-End with 11.5% PA Back-Off Efficiency;67
9.3.1;3.3.1 Circuit Description;69
9.3.2;3.3.2 Common-Mode Oscillations;69
9.3.3;3.3.3 Measurement Results;71
9.3.4;3.3.4 Conclusion;73
10;4 Digitally-Modulated Polar Transmitters in 40 nm CMOS;74
10.1;4.1 Introduction;74
10.2;4.2 Architecture and System Trade-Offs;76
10.2.1;4.2.1 60 GHz Polar TX Architecture;77
10.2.2;4.2.2 Signal Behavior and System-Level Trade-Offs;78
10.3;4.3 A 5-bit 5 GS/s RF-DAC-Based Polar TX with –29.3 dB QPSK EVM;82
10.3.1;4.3.1 Circuit Description;82
10.3.2;4.3.2 Measurement Results;87
10.3.3;4.3.3 Conclusions;97
10.4;4.4 A 4-bit 10 GS/s RF-DAC-Based Polar TX with 15.3% Average PA Efficiency;98
10.4.1;4.4.1 Circuit Description;98
10.4.2;4.4.2 Measurement Results;103
10.4.3;4.4.3 Analysis and Discussion;110
10.4.4;4.4.4 Comparison with State-of-the-Art;113
10.4.5;4.4.5 Conclusions;115
11;5 Summary and Conclusions;116
11.1;5.1 Conclusions;116
11.2;5.2 Possible Future Work;118
12; Loaded Transformer Input Impedance;120
12.1;A.1 Real Part of the Input Impedance;121
12.2;A.2 Imaginary Part of the Input Impedance;121
12.3;A.3 Simplified Input Impedance Equations;122
13; References;123




