Buch, Englisch, 349 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 569 g
ISBN: 978-1-4757-7926-4
Verlag: Springer US
I am glad to see this new book on the e language and on verification. I am especially glad to see a description of the e Reuse Methodology (eRM). The main goal of verification is, after all, finding more bugs quicker using given resources, and verification reuse (module-to-system, old-system-to-new-system etc. ) is a key enabling component. This book offers a fresh approach in teaching the e hardware verification language within the context of coverage driven verification methodology. I hope it will help the reader und- stand the many important and interesting topics surrounding hardware verification. Yoav Hollander Founder and CTO, Verisity Inc. Preface This book provides a detailed coverage of the e hardware verification language (HVL), state of the art verification methodologies, and the use of e HVL as a facilitating verification tool in implementing a state of the art verification environment. It includes comprehensive descriptions of the new concepts introduced by the e language, e language syntax, and its as- ciated semantics. This book also describes the architectural views and requirements of verifi- tion environments (randomly generated environments, coverage driven verification environments, etc. ), verification blocks in the architectural views (i. e. generators, initiators, c- lectors, checkers, monitors, coverage definitions, etc. ) and their implementations using the e HVL. Moreover, the e Reuse Methodology (eRM), the motivation for defining such a gui- line, and step-by-step instructions for building an eRM compliant e Verification Component (eVC) are also discussed.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Informatik Mathematik für Informatiker
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Technische Wissenschaften Energietechnik | Elektrotechnik Elektrotechnik
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
Weitere Infos & Material
Verification Methodologies and Environment Architecture.- Verification Methodologies.- Anatomy of a Verification Environment.- All About e.- e as a Programming Language.- e as a Verification Language.- Topology and Stimulus Generation.- Generator Operation.- Data Modeling and Stimulus Generation.- Sequence Generation.- Response Collection, Data Checking, and Property Monitoring.- Temporal Expressions.- Messages.- Collectors and Monitors.- Scoreboarding.- Coverage Modeling and Measurement.- Coverage Engine.- Coverage Modeling.- e Code Reuse.- e Reuse Methodology.- si_util Package.
