Buch, Englisch, Band 121, 162 Seiten, Paperback, Format (B × H): 155 mm x 235 mm, Gewicht: 3145 g
Buch, Englisch, Band 121, 162 Seiten, Paperback, Format (B × H): 155 mm x 235 mm, Gewicht: 3145 g
Reihe: Analog Circuits and Signal Processing
ISBN: 978-3-319-34533-8
Verlag: Springer International Publishing
A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
RF Receiver Architecture State-of-the-Art.- System-Level Design Framework for Direct RF Digitization Receivers.- Application to the System Design of a Multi-Channel Cable Receiver.- Realization & Measurements.- Conclusions & Perspectives.