E-Book, Englisch, 262 Seiten, eBook
Jabri / Coggins / Flower Adaptive Analog VLSI Neural Systems
1996
ISBN: 978-94-011-0525-5
Verlag: Springer Netherland
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, 262 Seiten, eBook
ISBN: 978-94-011-0525-5
Verlag: Springer Netherland
Format: PDF
Kopierschutz: 1 - PDF Watermark
Adaptive Analog VLSI Neural Systems is the first practical book on neural networks learning chips and systems. It covers the entire process of implementing neural networks in VLSI chips, beginning with the crucial issues of learning algorithms in an analog framework and limited precision effects, and giving actual case studies of working systems.
The approach is systems and applications oriented throughout, demonstrating the attractiveness of such an approach for applications such as adaptive pattern recognition and optical character recognition.
Dr Jabri and his co-authors from AT&T Bell Laboratories, Bellcore and the University of Sydney provide a comprehensive introduction to VLSI neural networks suitable for research and development staff and advanced students.
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
1 Overview.- Book roadmap.- Acknowledgements.- 2 Introduction to neural computing.- 2.1 Introduction.- 2.2 Framework.- 2.3 Learning.- 2.4 Perceptrons.- 2.5 The Multi-Layer Perceptron.- 2.6 The back-propagation algorithm.- 2.7 Comments.- 3 MOS devices and circuits.- 3.1 Introduction.- 3.2 Basic properties of MOS devices.- 3.3 Conduction in MOSFETs.- 3.4 Complementary MOSFETs.- 3.5 Noise in MOSFETs.- 3.6 Circuit models of MOSFETs.- 3.7 Simple CMOS amplifiers.- 3.8 Multistage op amps.- 3.9 Choice of amplifiers.- 3.10 Data converters.- 4 Analog VLSI building blocks.- 4.1 Functional designs to architectures.- 4.2 Neurons and synapses.- 4.3 Layout strategies.- 4.4 Simulation strategies.- 5 Kakadu — a micropower neural network.- 5.1 Advantages of analog implementation.- 5.2 Architecture.- 5.3 Implementation.- 5.4 Chip testing.- 5.5 Discussion.- 6 Supervised learning in an analog framework.- 6.1 Introduction.- 6.2 Learning in an analog framework.- 6.3 Notation.- 6.4 Weight update strategies.- 6.5 Learning algorithms.- 6.6 Credit assignment efficiency.- 6.7 Parallelization heuristics.- 6.8 Experimental methods.- 6.9 ICEG experimental results.- 6.10 Parity 4 experimental results.- 6.11 Discussion.- 6.12 Conclusions.- 7 A micropower intracardiac electrogram classifier.- 7.1 Introduction.- 7.2 Architecture.- 7.3 Training system.- 7.4 Classification performance and power consumption.- 7.5 Discussion.- 7.6 Conclusion.- 8 On-chip perturbation based learning.- 8.1 Introduction.- 8.2 On-chip learning multi-layer perceptron.- 8.3 On-chip learning recurrent neural network.- 8.4 Conclusion.- 9 An analog memory technique.- 9.1 Introduction.- 9.2 Self-refreshing storage cells.- 9.3 Multiplying DACs.- 9.4 A/D-D/A static storage cell.- 9.5 Basic principle of the storage cell.- 9.6 Circuit limitations.- 9.7 Layout considerations.- 9.8 Simulation results.- 9.9 Discussion.- 10 Switched capacitor techniques.- 10.1 A charge-based network.- 10.2 Variable gain, linear, switched capacitor neurons.- 11 A high speed image understanding system.- 11.1 Introduction.- 11.2 The NET32K chip.- 11.3 The NET32K board system.- 11.4 Applications.- 11.5 Summary and conclusions.- 12 A Boltzmann learning system.- 12.1 Introduction.- 12.2 The Boltzmann machine.- 12.3 Deterministic learning by error propagation.- 12.4 Mean-field version of Boltzmann machine.- 12.5 Electronic implementation of a Boltzmann machine.- 12.6 Building a system using the learning chips.- 12.7 Other applications.- References.




