Hori | Gate Dielectrics and MOS ULSIs | Buch | 978-3-642-64587-7 | sack.de

Buch, Englisch, Band 34, 352 Seiten, Book, Format (B × H): 155 mm x 235 mm, Gewicht: 562 g

Reihe: Springer Series in Electronics and Photonics

Hori

Gate Dielectrics and MOS ULSIs

Principles, Technologies and Applications
Softcover Nachdruck of the original 1. Auflage 1997
ISBN: 978-3-642-64587-7
Verlag: Springer

Principles, Technologies and Applications

Buch, Englisch, Band 34, 352 Seiten, Book, Format (B × H): 155 mm x 235 mm, Gewicht: 562 g

Reihe: Springer Series in Electronics and Photonics

ISBN: 978-3-642-64587-7
Verlag: Springer


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Content.- 1. Introduction.- 1.1 The History of Silicon MOS Devices.- 1.2 Scaling Issues in ULSIs.- 1.3 Requirements on Gate Dielectrics: Depending on Applications.- 1.3.1 Standard CMOS Logics.- 1.3.2 Storage Capacitors in DRAM Memories.- 1.3.3 Nonvolatile Memories.- 2. MIS Structure.- 2.1 Ideal MIS System.- 2.1.1 Theory of Semiconductor Surfaces.- 2.1.2 Ideal MIS Characteristics.- 2.2 Real System: Si-SiO2 MOS Technology.- 2.2.1 Band Diagram.- 2.2.2 Charges.- 2.3 Carrier Transport in Dielectric Films.- 2.4 Electrical Measurements.- 2.4.1 Measurement Setup.- 2.4.2 Steady-State High-Low Frequency C-V Method.- (a) Film Thickness.- (b) Work Function and Fixed-Charge Density.- (c) Interface-State Density.- 2.4.3 Other Measurements of Interface States.- (a) High-Frequency Method.- (b) Transient Spectroscopy.- (c) Charge-Pumping Method.- 2.4.4 Dielectric-Trap Charges.- (a) Carrier Injection.- (b) Trap Density and Capture Cross Section.- (c) Distribution of Traps.- 3. MOS Field-Effect Transistor.- 3.1 Classical MOS Transistor.- 3.1.1 ON-State: Linear and Saturation Regions.- 3.1.2 OFF-State: Subthreshold Region.- 3.2 MOSFET Parameters.- 3.2.1 Subthreshold Swing.- 3.2.2 Threshold Voltage.- (a) n-FETs with VT Adjustment.- (b) Buried-Channel p-FETs.- 3.2.3 Mobility.- (a) Velocity Saturation Along the Lateral Field.- (b) Inversion-Layer Mobility.- (c) Universal Relation for the Effective Normal Field.- 3.2.4 Channel Length.- 3.2.5 Saturation Parameters.- 3.3 Scaling.- 3.3.1 The Scaling Law.- 3.3.2 Practical Scaling.- 3.3.3 Scaling Limitations in MOS Technology.- (a) Small-Geometry Effects.- (b) Limited Performance Under High Fields.- (c) Hot-Carrier Effects and Drain Engineering.- (d) Gate-Induced Drain Leakage.- (e) Dielectric Reliability and Gate Electrodes.- 3.4 Device Integration.- 3.4.1 CMOS Circuit Performance.- 3.4.2 Process Integration.- 3.4.3 Yield in ULSI Technology.- 4. Thermally Grown Silicon Oxide.- 4.1 Processing.- 4.1.1 Pre-Processing.- 4.1.2 Oxidation of Silicon.- 4.1.3 Post-Processing.- 4.2 Electrical and Physical Characteristics.- 4.2.1 Fixed Charges and Interface States.- 4.2.2 Mobility.- 4.2.3 Atomic Configurations.- 4.3 Charge-Trapping Characteristics.- 4.3.1 Electron Trapping.- 4.3.2 Hole Trapping.- 4.3.3 Interface-State Generation.- 4.3.4 Radiation Damage.- 4.3.5 High-Field Stress.- 4.4 Dielectric Breakdown.- 4.4.1 Time-Zero Dielectric Breakdown.- 4.4.2 Time-Dependent Dielectric Breakdown.- (a) Intrinsic Breakdown.- (b) Extrinsic Breakdown.- (c) Thickness Dependence.- 4.4.3 Application-Dependent Breakdowns.- (a) Electrode-Related Breakdown.- (b) Isolation-Related Breakdown.- (c) Oxide Integrity Degradation Near Gate Edges.- (d) Nonvolatile Memories.- 4.5 Hot-Carrier-Induced Degradation.- 4.5.1 Degradation in n-Channel FETs.- 4.5.2 Degradation in p-Channel FETs.- 4.5.3 Increase in GIDL Current.- 4.6 Other Silicon Oxides.- 4.7 Summary and Future Trends.- 5. Thermally Nitrided Oxides: for Flash Memories.- 5.1 Processing and Material Properties.- 5.1.1 Thermal Nitridation.- 5.1.2 Nitridation of SiO2 Films in NH3.- (a) Processing Issues.- (b) Rapid Thermal Processing.- (c) Nitridation of SiO2.- 5.1.3 Post-Nitridation Anneal.- 5.1.4 Hydrogen Impurities.- 5.1.5 Nitridation in N2O.- 5.1.6 Atomic Configurations.- 5.2 Electrical Characteristics and Performance.- 5.2.1 Film Thickness and Dielectric Constant.- 5.2.2 Charges.- 5.2.3 Mobility.- (a) Electron Mobility.- (b) Hole Mobility.- (c) Discussion on the.Mobility Modulation.- 5.2.4 MOSFET Characteristics.- 5.3 Dielectric Reliability.- 5.3.1 Carrier Transport and Traps.- 5.3.2 High-Field-Induced Degradation.- (a) Dependence on the Fabrication Condition.- (b) A Model for Electron Trapping.- (c) A Model for Interface-State Generation.- 5.3.3 Dielectric Breakdown.- (a) Charge-to-Breakdown.- (b) Extrinsic Breakdown.- 5.3.4 Radiation Damage.- 5.3.5 Device Applications.- (a) Nonvolatile Memories.- (b) CMOSFETs with Advanced Gates.- 5.4 Issues Inherent to Scaled MOSFETs.- 5.4.1 Hot-Carrier Effects in n-FETs.- (a) Substrate and Gate Current.- (b) Hot-Carrier-Induced Degradation.- (c) Device Lifetime.- 5.4.2 Hot-Carrier Effects in p-FETs.- 5.4.3 GIDL Effects.- 5.4.4 Overall Consideration.- 5.5 Summary and Outlook.- 6. High-Dielectric Constant Films: for Passive Capacitance.- 6.1 Silicon Nitride (Si3N4).- 6.1.1 MNOS Device.- 6.1.2 Oxide-Nitride-Oxide.- 6.2 Tantalum Oxide (Ta2O5.- 6.3 Ferroelectrics.- 6.3.1 What is the Meaning of “Ferroelectric”?.- (a) Ferroelectric Properties.- (b) Issues Common to ULSI Applications.- 6.3.2 Application to DRAM Storage Capacitors.- 6.3.3 Application to Nonvolatile Memories.- References.



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