ASIC Design Implementation Process

A Complete Framework
2024
ISBN: 978-3-031-58652-1
Verlag: Springer Nature Switzerland

Buch, Englisch, 135 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 407 g

This book is an easy-to-read guide, providing a complete framework for the ASIC design process. Based on the author’s extensive experience leading ASIC design teams, this book emphasizes short, clear descriptions, supplemented by references to authoritative manuscripts. This approach presents the essence of the ASIC design implementation process for those involved in a specific part of the process, while providing knowledge of the entire process.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

Golshan, Khosrow

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise

Inhaltsverzeichnis

1. Design Requirements.- 2. Design Validation.- 3. Design Synthesis.- 4. Physical Design.- 5. Design Verification.- 6. ASIC Testing.- 7. ASIC Qualification.- .

Über Autor(innen)

Khosrow Golshan has over 20 years of experience in ASIC design implementation methodology, flow development, and digital ASIC libraries design. He is the author of Physical Design Essentials—An ASIC Design Implementation Perspective, and The Art of Timing Closure— Advanced Design Implementation. In addition, he has published many technical articles and has held several US patents. The author has earned degrees in the areas of Advanced Electrical Engineering (Southern Methodist University, Dallas, TX, Engineering Dept. ), Master of Science in Electrical Engineering (West Coast University, Los Angeles, CA, Engineering Dept.), Master of Science in Applied Mathematics (Southern Methodist University, Dallas, TX, Mathematics Dept.), and a Bachelor of Science in Electronic Engineering (DeVry University, Dallas, TX, Engineering Dept.). He is also an IEEE life member.