Glasser Open Verification Methodology Cookbook

1. Auflage 2009
ISBN: 978-1-4419-0968-8
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 235 Seiten

Functional verification is an art as much as a science. It requires not only creativity and cunning, but also a clear methodology to approach the problem. The Open Verification Methodology (OVM) is a leading-edge methodology for verifying designs at multiple levels of abstraction. It brings together ideas from electrical, systems, and software engineering to provide a complete methodology for verifying large scale System-on-Chip (SoC) designs. OVM defines an approach for developing testbench architectures so they are modular, configurable, and reusable. This book is designed to help both novice and experienced verification engineers master the OVM through extensive examples. It describes basic verification principles and explains the essentials of transaction-level modeling (TLM). It leads readers from a simple connection of a producer and a consumer through complete self-checking testbenches. It explains construction techniques for building configurable, reusable testbench components and how to use TLM to communicate between them. Elements such as agents and sequences are explained in detail.

Autoren/Hrsg.

Glasser, Mark

Inhaltsverzeichnis

1;Open Verification Methodology Cookbook;2
1.1;Preface;6
1.2;Contents;12
1.3;List of Figures;15
1.4;Introduction;19
1.5;Verification Principles;21
1.5.1;1.1 Verification Basics;21
1.5.1.1;1.1.1 Two Questions;22
1.5.1.2;1.1.2 Does It Work?;22
1.5.1.3;1.1.3 Are We Done?;25
1.5.1.4;1.1.4 Two-Loop Flow;26
1.5.2;1.2 First Testbench;27
1.5.2.1;1.2.1 DUT;29
1.5.2.2;1.2.2 Scoreboard;30
1.5.3;1.3 Second Testbench;31
1.5.3.1;1.3.1 3-Bit Counter;33
1.5.4;1.4 Layered Organization of Testbenches;37
1.5.4.1;1.4.1 Transactors;39
1.5.4.2;1.4.2 Operational Components;39
1.5.4.3;1.4.3 Analysis Components;40
1.5.4.4;1.4.4 Controller;41
1.5.5;1.5 Two Domains;41
1.5.6;1.6 Summary;43
1.6;Fundamentals of Object-Oriented Programming;44
1.6.1;2.1 Procedural vs. OOP;44
1.6.2;2.2 Classes and Objects;46
1.6.3;2.3 Object Relationships;50
1.6.3.1;2.3.1 HAS-A;50
1.6.3.2;2.3.2 IS-A;51
1.6.4;2.4 Virtual Functions and Polymorphism;53
1.6.5;2.5 Generic Programming;57
1.6.5.1;2.5.1 Generic Stack;59
1.6.6;2.6 Classes and Modules;62
1.6.7;2.7 OOP and Verification;65
1.7;Transaction-Level Modeling;66
1.7.1;3.1 Abstraction;66
1.7.2;3.2 Definition of a Transaction;68
1.7.3;3.3 Interfaces;69
1.7.4;3.4 TLM Idioms;71
1.7.4.1;3.4.1 Put;71
1.7.4.2;3.4.2 Get;74
1.7.4.3;3.4.3 Transport;75
1.7.4.4;3.4.4 Blocking vs. Nonblocking;78
1.7.5;3.5 Isolating Components with Channels;81
1.7.6;3.6 Forming a Transaction-Level Connection;84
1.7.7;3.7 Summary;85
1.8;OVM Mechanics;86
1.8.1;4.1 Components and Hierarchy;86
1.8.1.1;4.1.1 Traversing the Hierarchy;88
1.8.1.2;4.1.2 Singleton Top;90
1.8.2;4.2 Connectivity;90
1.8.2.1;4.2.1 Connecting across the Hierarchy;91
1.8.2.2;4.2.2 Note to AVM Users;96
1.8.3;4.3 Phases;96
1.8.4;4.4 Config;100
1.8.4.1;4.4.1 Configuration and Phasing;104
1.8.5;4.5 Factory;106
1.8.5.1;4.5.1 How the Factory Works;107
1.8.5.2;4.5.2 The OVM Factory API;113
1.8.5.3;4.5.3 String-Based or Type-Based?;116
1.8.6;4.6 Shutting Down the Testbench;117
1.8.6.1;4.6.1 Timeout;120
1.8.7;4.7 Connecting Testbenches to Hardware;121
1.8.8;4.8 Tests and Testbenches;127
1.8.9;4.9 Reporting;128
1.8.9.1;4.9.1 Basic Messaging;128
1.8.9.2;4.9.2 Message Actions;130
1.8.9.3;4.9.3 Message Files;131
1.8.9.4;4.9.4 Message Handlers;131
1.8.9.5;4.9.5 Altering the Flow of Control;133
1.8.10;4.10 Summary;136
1.9;Testbench Fundamentals;137
1.9.1;5.1 Drivers and Monitors;137
1.9.2;5.2 Introducing the HFPB Protocol;141
1.9.2.1;5.2.1 HFPB Write Operation;143
1.9.2.2;5.2.2 Basic Read Operation;144
1.9.3;5.3 An RTL Memory Slave;145
1.9.4;5.4 Monitors and Analysis Ports;148
1.9.5;5.5 Summary;150
1.10;Reuse;151
1.10.1;6.1 Types of Reuse (or Reuse of Types);151
1.10.2;6.2 Reusable Components;152
1.10.3;6.3 Agents;156
1.10.4;6.4 Reusable HFPB Protocol;158
1.10.5;6.5 Agent Example;164
1.10.6;6.6 Summary;166
1.11;Complete Testbenches;167
1.11.1;7.1 Floating Point Unit;167
1.11.2;7.2 Coverage Collectors;170
1.11.3;7.3 FPU Agent;172
1.11.4;7.4 Scoreboards;175
1.11.5;7.5 Different Tests;177
1.11.6;7.6 Summary;180
1.12;Sequences;181
1.12.1;8.1 Sequence Basics;181
1.12.2;8.2 A Sequence Example;182
1.12.3;8.3 Anatomy of a Sequence;187
1.12.4;8.4 Another Sequence API;189
1.12.5;8.5 Response Routing;191
1.12.6;8.6 Sequences in Parallel;195
1.12.7;8.7 Constructing APIs with Sequences;197
1.12.8;8.8 Summary;200
1.13;Block-to-System;201
1.13.1;9.1 Reusing Block-Level Components;201
1.13.2;9.2 Reusing Block-Level Testbenches;203
1.13.3;9.3 Testing at the System Level;209
1.13.4;9.4 Summary;211
1.14;Coding Conventions;212
1.14.1;10.1 Naming Scheme;212
1.14.2;10.2 Global or Local?;216
1.14.3;10.3 Objects;219
1.14.3.1;10.3.1 Components;220
1.14.3.2;10.3.2 Sequences;222
1.14.3.3;10.3.3 Transactions and Sequence Items;222
1.14.4;10.4 Packages;223
1.14.5;10.5 Comments;225
1.14.6;10.6 Summary;225
1.15;Afterword;227
1.16;Graphic Notation;228
1.16.1;A.1 Components;228
1.16.2;A.2 Interfaces;229
1.16.3;A.3 Interconnect;230
1.16.4;A.4 Channels;231
1.16.5;A.5 Analysis Ports;232
1.16.6;A.6 Summary;233
1.17;Bibliography;234
1.18;Index;236