E-Book, Englisch, 179 Seiten, eBook
ISBN: 978-1-4757-3184-2
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
Formal Verification of Circuits
is devoted to the discussion of recent developments in the field of decision diagram-based formal verification. Firstly, different types of decision diagrams (including WLDDs) are introduced and theoretical properties are discussed that give further insight into the data structure. Secondly, implementation and minimization concepts are presented. Applications to arithmetic circuit verification and verification of designs specified by hardware description languages are described to show how WLDDs work in practice.
Formal Verification of Circuits
is intended for CAD developers and researchers as well as designers using modern verification tools. It will help people working with formal verification (in industry or academia) to keep informed about recent developments in this area.
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
1 Introduction.- 2 Notations and Definitions.- 3 Decision Diagrams.- 4 Theoretical Aspects of WLDDs.- 5 Implementation of WLDDs.- 6 Minimization of DDs.- 7 Arithmetic Circuits.- 8 Verification of Hdls.- 9 Conclusions.- References.