E-Book, Englisch, 472 Seiten
Douglass Design Patterns for Embedded Systems in C
1. Auflage 2010
ISBN: 978-0-08-095971-9
Verlag: Elsevier Science & Techn.
Format: EPUB
Kopierschutz: 6 - ePub Watermark
An Embedded Software Engineering Toolkit
E-Book, Englisch, 472 Seiten
ISBN: 978-0-08-095971-9
Verlag: Elsevier Science & Techn.
Format: EPUB
Kopierschutz: 6 - ePub Watermark
Embedded Software Methodologist. Triathlete. Systems engineer. Contributor to UML and SysML specifications. Writer. Black Belt. Neuroscientist. Classical guitarist. High school dropout. Bruce Powel Douglass, who has a doctorate in neurocybernetics from the USD Medical School, has over 35 years of experience developing safety-critical real-time applications in a variety of hard real-time environments. He is the author of over 5700 book pages from a number of technical books including Real-Time UML, Real-Time UML Workshop for Embedded Systems, Real-Time Design Patterns, Doing Hard Time, Real-Time Agility, and Design Patterns for Embedded Systems in C. He is the Chief Evangelist at IBM Rational, where he is a thought leader in the systems space and consulting with and mentors IBM customers all over the world. He can be followed on Twitter @BruceDouglass. Papers and presentations are available at his Real-Time UML Yahoo technical group (http://tech.groups.yahoo.com/group/RT-UML) and from his IBM thought leader page (www-01.ibm.com/software/rational/leadership/thought/brucedouglass.html).
Autoren/Hrsg.
Weitere Infos & Material
1;Cover;1
2;Design Patterns for Embedded Systems in C;2
3;Copyright;5
4;Contents;8
5;Preface;16
6;Acknowledgements;18
7;About the Author;19
8;Chapter 1 What Is Embedded Programming?;22
8.1;1.1 What’s Special About Embedded Systems?;22
8.2;1.2 OO or Structured – It’s Your Choice;30
8.3;1.3 What Did We Learn?;54
9;Chapter 2 Embedded Programming with The HarmonyTM for EmbeddedRealTime Process;56
9.1;2.1 Basic Elements of the Harmony Process;57
9.2;2.2 The Approach;98
9.3;2.3 What’s Coming Up;99
10;Chapter 3 Design Patterns for Accessing Hardware;100
10.1;3.1 Basic Hardware Access Concepts;102
10.2;3.2 Hardware Proxy Pattern;106
10.3;3.3 Hardware Adapter Pattern;117
10.4;3.4 Mediator Pattern;121
10.5;3.5 Observer Pattern;132
10.6;3.6 Debouncing Pattern;143
10.7;3.7 Interrupt Pattern;151
10.8;3.8 Polling Pattern;159
10.9;3.9 So, What Did We Learn?;168
11;Chapter 4 Design Patterns for Embedding Concurrency and ResourceManagement;170
11.1;4.1 Basic Concurrency Concepts;173
11.2;4.2 Cyclic Executive Pattern;185
11.3;4.3 Static Priority Pattern;191
11.4;4.4 Critical Region Pattern;203
11.5;4.5 Guarded Call Pattern;211
11.6;4.6 Queuing Pattern;11
11.7;4.7 Rendezvous Pattern;245
11.8;4.8 Simultaneous Locking Pattern;253
11.9;4.9 Ordered Locking;263
11.10;4.10 So, What Have We Learned?;276
12;Chapter 5 Design Patterns for State Machines;278
12.1;5.1 Oh Behave;280
12.2;5.2 Basic State Machine Concepts;282
12.3;5.3 Single Event Receptor Pattern;295
12.4;5.4 Multiple Event Receptor Pattern;308
12.5;5.5 State Table Pattern;317
12.6;5.6 State Pattern;329
12.7;5.7 AND-States;348
12.8;5.8 Decomposed AND-State Pattern;351
12.9;5.9 OK, What Have We Learned?;377
13;Chapter 6 Safety and Reliability Patterns;378
13.1;6.1 A Little Bit About Safety and Reliability;380
13.2;6.2 One’s Complement Pattern;383
13.3;6.3 CRC Pattern;388
13.4;6.4 Smart Data Pattern;401
13.5;6.5 Channel Pattern;416
13.6;6.6 Protected Single Channel Pattern;423
13.7;6.7 Dual Channel Pattern;434
13.8;6.8 Summary;443
14;Appendix A UML Notation;446
14.1;1.1 Class Diagram;446
14.2;1.2 Sequence Diagram;450
14.3;1.3 State Diagram;451
15;Index;458




