Digital Video Processing for Engineers

A Foundation for Embedded Systems Design
Erscheinungsjahr 2012
ISBN: 978-0-12-415760-6
Verlag: Elsevier Science

Buch, Englisch, 232 Seiten, Format (B × H): 187 mm x 233 mm, Gewicht: 495 g

Any device or system with imaging functionality requires a digital video processing solution as part of its embedded system design. Engineers need a practical guide to technology basics and design fundamentals that enables them to deliver the video component of complex projects.

This book introduces core video processing concepts and standards, and delivers practical how-to guidance for engineers embarking on digital video processing designs using FPGAs. It covers the basic topics of video processing in a pictorial, intuitive manner with minimal use of mathematics. Key outcomes and benefits of this book for users include: understanding the concepts and challenges of modern video systems; architect video systems at a system level; reference design examples to implement your own high definition video processing chain; understand implementation trade-offs in video system designs.

Zielgruppe

<p>Electronic design and implementation engineers, software engineers, hardware engineers, system engineers and students with limited or no VP/DSP experience. </p>

Autoren/Hrsg.

Dhanani, Suhel

Parker, Michael

Fachgebiete

• Mathematik | Informatik EDV | Informatik Professionelle Anwendung Digitales Video
• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Mathematik | Informatik EDV | Informatik Informatik Bildsignalverarbeitung

Inhaltsverzeichnis

Components of a digital video signalResolution and FormatsVideo InterfacesVideo ProcessingScalingDe-interlacingMixing (Alpha Blending)Sensor processing for image sensorsEntropy and QuantizationLossy and Lossless CompressionVideo Compression Standards and QualityVideo Modulation and TransportVideo over IPImplementing HD ASICs and FPGAsVideo BottleneckBuilding an HD Video systemSynchronization IssuesAudioIP ReuseDebugging Video Systems

Über Autor(innen)

Parker, Michael
Michael Parker is responsible for Intel's FPGA division digital signal processing (DSP) product planning. This includes Variable Precision FPGA silicon architecture for DSP applications, DSP tool development, floating point tools, IP and video IP. He joined Altera (now Intel) in January 2007, and has over 20 years of previous DSP engineering design experience with companies such as Alvarion, Soma Networks, Avalcom, TCSI, Stanford Telecom and several startup companies. He holds an MSEE from Santa Clara University, and BSEE from Rensselaer Polytechnic Institute.