De Schryver FPGA Based Accelerators for Financial Applications

1. Auflage 2016
ISBN: 978-3-319-15407-7
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 273 Seiten, eBook

This book covers the latest approaches and results from reconfigurable computing architectures employed in the finance domain. So-called field-programmable gate arrays (FPGAs) have already shown to outperform standard CPU- and GPU-based computing architectures by far, saving up to 99% of energy depending on the compute tasks. Renowned authors from financial mathematics, computer architecture and finance business introduce the readers into today’s challenges in finance IT, illustrate the most advanced approaches and use cases and present currently known methodologies for integrating FPGAs in finance systems together with latest results. The complete algorithm-to-hardware flow is covered holistically, so this book serves as a hands-on guide for IT managers, researchers and quants/programmers who think about integrating FPGAs into their current IT systems.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

De Schryver, Christian

Inhaltsverzeichnis

10 Computational Challenges in Finance.- From model to application: calibration to market data.- Comparative study of acceleration platforms for Heston’s stochastic volatility model.- Towards Automated Benchmarking and Evaluation of Heterogeneous Systems in Finance.- Is High Level Synthesis ready for business? An Option Pricing Case Study.- High-Bandwidth Low-Latency Interfacing with FPGA Accelerators Using PCI Express.- Pricing High-Dimensional American Options on Hybrid CPU/FPGA Systems.- Bringing Flexibility to FPGA Based Pricing Systems.- Exploiting mixed-precision arithmetics in a multilevel Monte Carlo approach on FPGAs.- Accelerating Closed-Form Heston Prices for Calibration.

Über Autor(innen)

Dr.-Ing. Christian De Schryver graduated in Information Technology in 2008 and received a PhD in Electrical Engineering in 2014, both from the University in Kaiserslautern, Germany. At this place, he is currently a Post-Doc and Senior Member of the Customized High Performance Computing (CHPC) research team within the Microelectronic Systems Design Research Group headed by Prof. Dr. Norbert Wehn. His research interests are design methodologies for application-tailored heterogeneous execution platforms, hardware accelerators for supercomputing applications (in particular finance and big data processing) and system-level design flows.