Buch, Englisch, 388 Seiten, Previously published in hardcover, Format (B × H): 175 mm x 254 mm, Gewicht: 717 g
For Programmers and Engineers
Buch, Englisch, 388 Seiten, Previously published in hardcover, Format (B × H): 175 mm x 254 mm, Gewicht: 717 g
ISBN: 978-1-4419-1935-9
Verlag: Springer
Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource.
Zielgruppe
Professional/practitioner
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering Objektorientierte Softwareentwicklung
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Programmierung: Methoden und Allgemeines
- Mathematik | Informatik EDV | Informatik Technische Informatik Systemverwaltung & Management
- Mathematik | Informatik EDV | Informatik Technische Informatik Hochleistungsrechnen, Supercomputer
Weitere Infos & Material
Overview.- Processor Design Issues.- RISC Principles.- Architectures.- MIPS Architecture.- SPARC Architecture.- PowerPC Architecture.- Itanium Architecture.- ARM Architecture.- MIPS Assembly Language.- SPIM Simulator and Debugger.- Assembly Language Overview.- Procedures and the Stack.- Addressing Modes.- Arithmetic Instructions.- Conditional Execution.- Logical and Shift Operations.- Recursion.- Floating-Point Operations.
