Chu | Embedded SoPC Design with Nios II Processor and Verilog Examples | Buch | 978-1-118-01103-4 | sack.de

Buch, Englisch, 782 Seiten, Format (B × H): 182 mm x 261 mm, Gewicht: 1484 g

Chu

Embedded SoPC Design with Nios II Processor and Verilog Examples


1. Auflage 2012
ISBN: 978-1-118-01103-4
Verlag: Wiley

Buch, Englisch, 782 Seiten, Format (B × H): 182 mm x 261 mm, Gewicht: 1484 g

ISBN: 978-1-118-01103-4
Verlag: Wiley


This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers.

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Autoren/Hrsg.


Weitere Infos & Material


Preface xxvii

Acknowledgments

1 Overview of Embedded System 1

Part I: Basic Digital Circuits Development

2 Gate-level Combinational Circuit 11

3 Overview of FPGA and EDA Software 25

4 RT-level Combinational Circuit 53

5 Regular Sequential Circuit 93

6 FSM 137

7 FSMD 155

8 Selected Topics of Verilog 188

Part II: Basic Nois II Software Development

9 Nios II Processor Overview 229

10 NIOS II System Derivation and Low-Level Access 237

11 Predesigned Nios II I/O Peripherals 265

12 Predesigned Nios II I/O Drivers and HAL API 303

13 Interrupt and ISR 325

Part III: Custom I/O Peripheral Development

14 Custom I/O Peripheral with PIO Cores 345

15 Avalon Interconnect and SOPC Component 351

16 SRAM and SDRAM Controllers 385

17 PS2 Keyboard and Mouse 423

18 VGA Controller 475

19 Audio Codec Controller 555

20 SD Card Controller 601

Part IV: Hardware Acclerator Case Studies

21 GCD Accelerator 663

22 Mandelbrot Set Fractal Accelerator 681

23 Direct Digital Frequency Synthesis 715

References 741

Topic Index 745


Chu, Pong P
Dr. Pong P. Chu is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

DR. PONG P. CHU is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.



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