E-Book, Englisch, 197 Seiten, eBook
Chavet / Coussy Advanced Hardware Design for Error Correcting Codes
2015
ISBN: 978-3-319-10569-7
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, 197 Seiten, eBook
ISBN: 978-3-319-10569-7
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
User Needs.- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding.- Implementation of Polar Decoders.- Parallel architectures for Turbo Product Codes Decoding.- VLSI implementations of sphere detectors.- Stochastic Decoders for LDPC Codes.- MP-SoC/NoC architectures for error correction.- ASIP design for multi-standard channel decoders.- Hardware design of parallel interleaver architecture: a survey.