Cavanagh | Computer Arithmetic and Verilog HDL Fundamentals | Buch | 978-1-4398-1124-5 | www2.sack.de

Buch, Englisch, 972 Seiten, Format (B × H): 187 mm x 261 mm, Gewicht: 1858 g

Cavanagh

Computer Arithmetic and Verilog HDL Fundamentals


1. Auflage 2009
ISBN: 978-1-4398-1124-5
Verlag: Taylor & Francis Inc

Buch, Englisch, 972 Seiten, Format (B × H): 187 mm x 261 mm, Gewicht: 1858 g

ISBN: 978-1-4398-1124-5
Verlag: Taylor & Francis Inc


Verilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction.

Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International’s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities.

Introducing the three main modeling methods—dataflow, behavioral, and structural—this self-contained tutorial—

- Covers the number systems of different radices, such as octal, decimal, hexadecimal, and binary-coded variations

- Reviews logic design fundamentals, including Boolean algebra and minimization techniques for switching functions

- Presents basic methods for fixed-point addition, subtraction, multiplication, and division, including the use of decimals in all four operations

- Addresses floating-point addition and subtraction with several numerical examples and flowcharts that graphically illustrate steps required for true addition and subtraction for floating-point operands

- Demonstrates floating-point division, including the generation of a zero-biased exponent

Designed for electrical and computer engineers and computer scientists, this book leaves nothing unfinished, carrying design examples through to completion. The goal is practical proficiency. To this end, each chapter includes problems of varying complexity to be designed by the reader.

Cavanagh Computer Arithmetic and Verilog HDL Fundamentals jetzt bestellen!

Zielgruppe


Electrical and computer engineers who design digital arithmetic hardware; students in electrical engineering, computer engineering, and computer science.


Autoren/Hrsg.


Weitere Infos & Material


Number Systems and Number Representations. Logic Design Fundamentals. Introduction to Verilog HDL. Fixed-Point Addition. Fixed-Point Subtraction. Fixed-Point Multiplication. Fixed-Point Division. Decimal Addition. Decimal Subtraction. Decimal Multiplication. Decimal Division. Floating-Point Addition. Floating-Point Subtraction. Floating-Point Multiplication. Floating-Point Division. Additional Floating-Point Topics. Additional Topics in Computer Arithmetic. Appendices. Index.


Joseph Cavanagh is an adjunct professor in the computer engineering department at Santa Clara University in California.



Ihre Fragen, Wünsche oder Anmerkungen
Vorname*
Nachname*
Ihre E-Mail-Adresse*
Kundennr.
Ihre Nachricht*
Lediglich mit * gekennzeichnete Felder sind Pflichtfelder.
Wenn Sie die im Kontaktformular eingegebenen Daten durch Klick auf den nachfolgenden Button übersenden, erklären Sie sich damit einverstanden, dass wir Ihr Angaben für die Beantwortung Ihrer Anfrage verwenden. Selbstverständlich werden Ihre Daten vertraulich behandelt und nicht an Dritte weitergegeben. Sie können der Verwendung Ihrer Daten jederzeit widersprechen. Das Datenhandling bei Sack Fachmedien erklären wir Ihnen in unserer Datenschutzerklärung.