E-Book, Englisch, Band 621, 364 Seiten, eBook
Reihe: IFIP Advances in Information and Communication Technology
Calimera / Gaillardon / Korgaonkar VLSI-SoC: Design Trends
Erscheinungsjahr 2021
ISBN: 978-3-030-81641-4
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6–9, 2020, Revised and Extended Selected Papers
E-Book, Englisch, Band 621, 364 Seiten, eBook
Reihe: IFIP Advances in Information and Communication Technology
ISBN: 978-3-030-81641-4
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22nm FDSOI .- A 125 pJ/b Mixed-Mode MCMC MIMO Detector with Relaxed DSP .- Low Power Current-Mode Relaxation Oscillators for Temperature and Supply Voltage Monitoring .- Fully-Autonomous SoC Synthesis using Customizable Cell-Based Analog and Mixed-signal Circuits Generation.- Assessing the Configuration Space of the Open Source NVDLA Deep Learning Accelerator on a Mainstream MPSoC Platform .- SAT-Based Mapping of Data-Flow Graph onto Coarse-Grained Reconfigurable Array.- Learning Based Timing Closure on Relative Timed Design .- Multilevel Signalling for High-Speed Chiplet-to-Chiplet Communication .- From Informal Specifications to an ABV Framework for Industrial Firmware Verification .- Modular Functional Testing: Targeting the Small Embedded Memories in GPUs.- RAT: A Lightweight Architecture Independent System-level Soft Error Mitigation Technique .- SANSCrypt: Sporadic-Authentication-Based Sequential Logic Encryption .- 3D Nanofabric: Layout Challenges and Solutions for Ultra-Scaled Logic Designs.- 3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.- Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics .- A Technology Backward-Compatible Compilation Flow for Processing-In-Memory .