Bhattacharyya / Deprettere / Leupers Handbook of Signal Processing Systems

Third Auflage 2019
ISBN: 978-3-319-91734-4
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 1203 Seiten, eBook

In this new edition of the Handbook of Signal Processing Systems, many of the chapters from the previous editions have been updated, and several new chapters have been added. The new contributions include chapters on signal processing methods for light field displays, throughput analysis of dataflow graphs, modeling for reconfigurable signal processing systems, fast Fourier transform architectures, deep neural networks, programmable architectures for histogram of oriented gradients processing, high dynamic range video coding, system-on-chip architectures for data analytics, analysis of finite word-length effects in fixed-point systems, and models of architecture. 
There are more than 700 tables and illustrations; in this edition over 300 are in color.

 This new edition of the handbook is organized in three parts. Part I motivates representative applications that drive and apply state-of-the art methods for design and implementation of signal processing systems; Part II discusses architectures for implementing these applications; and Part III focuses on compilers, as well as models of computation and their associated design tools and methodologies.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

Bhattacharyya, Shuvra S.

Deprettere, Ed F.

Leupers, Rainer

Takala, Jarmo

Inhaltsverzeichnis

1 Signal Processing Methods for Light Field Displays. 2 Inertial Sensors and Their Applications.- 3 Finding It Now: Construction and Configuration of Networked Classifiers in Real-Time Stream Mining Systems.- 4 Deep Neural Networks: A Signal Processing Perspective.- 5 High Dynamic Range Video Cooling.- 6 Signal Processing for Control.- 7 MPEG Reconfigurable Video Coding.- 8 Signal Processing for Wireless Transceivers.- 9 Signal Processing for Radio Astronomy.- 10 Distributed Smart Cameras and Distributed Computer Vision.- 11 Arithmetic.- 12 Coarse Grained Reconfigurable Array Architectures.- 13 High Performance Stream Processing on FPGA.- 14 Application-specific Accelerators for Communications.- 15 System-on-chip Architectures for Data Analytics.-  16 Architectures for Stereo Vision.- 17 Hardware Architectures for the Fast Fourier Transform.- 18 Programmable Architectures for Histogram of Oriented Gradients Processing.- 19 Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-on-chip.- 20 Intermediate Representations for Simulation and Implementation.- 21 Throughput Analysis of Dataflow Graphs.- 22 Dataflow Modeling for Reconfigurable Signal Processing Systems.- 23 Integrated Modeling Using Finite State Machines and Dataflow Graphs.- 24 Kahn Process Networks and a Reactive Extension.- 25 Decidable Signal Processing Dataflow Graphs.- 26 Systolic Arrays.- 27 Compiling for VLIW DSPs.- 28 Software Compilation Techniques for Heterogeneous Embedded Multi-Core Systems.- 29 Analysis of Finite Word-Length Effects in Fixed-Point Systems.- 30 Models of Architecture for DSP Systems.- 31 Optimization of Number Representations.- 32 Dynamic Dataflow Graphs.

Über Autor(innen)

Shuvra S. Bhattacharyya is a Professor in the Department of Electrical and Computer Engineering at the University of Maryland, College Park. He holds a joint appointment in the University of Maryland Institute for Advanced Computer Studies (UMIACS). From January 2015 through December 2018, he is also a part-time visiting professor in the Department of Pervasive Computing at the Tampere University of Technology, Finland, as part of the Finland Distinguished Professor Programme (FiDiPro). His research interests include signal processing, embedded systems, electronic design automation, wireless communication, and wireless sensor networks. He received the B.S. degree from the University of Wisconsin at Madison, and the Ph.D. degree from the University of California at Berkeley.  He has held industrial positions as a Researcher at the Hitachi America Semiconductor Research Laboratory (San Jose, California), and Compiler Developer at Kuck & Associates (Champaign, Illinois). He has held a visiting research position at the US Air Force Research Laboratory (Rome, New York). He has been a Nokia Distinguished Lecturer (Finland) and Fulbright Specialist (Austria and Germany). He has received the NSF Career Award (USA). He is a Fellow of the IEEE.

Ed F. Deprettere received the M.Sc degree in Electrical Engineering from Ghent University (Belgium) in 1968, and the Ph.D. degree in Electrical Engineering from Delft University of Technology (The Netherlands) in 1980. At Delft he has held visiting research positions at Stanford University, University of California at Los Angeles, and Philips Research.  In 2000 he joined Leiden University as full professor in the Leiden Institute of Advanced Computer Science, where he has been head of the Leiden Embedded Research Center. While in Leiden, he held visiting professor positions at the Indian Institute of Science (Bangalore, India), and the Technical University of Sofia (Bulgaria). He was founder of the Daedalus foundation which was to coordinate the co-operation with Sofia.  Ed F. Deprettere is now emeritus professor since 2012.

Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the chief engineer at the Embedded Systems chair at TUDortmund. In 2002, Dr. Leupers joined RWTH Aachen University as a professor for Software for Systems on Silicon. Since then, he has also been a visiting faculty member at the ALARI Institute in Lugano. His research and teaching activities comprise software development tools, processor architectures, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers, and heserved in committees of leading international conferences, including DAC, DATE, and ICCAD. He was a co-chair of the MPSoC Forum and SCOPES. Dr. Leupers received several scientific awards, including Best Paper Awards at DATE 2000, 2008 and DAC 2002, as well as multiple industry awards. He holds several patents on processor design automation technologies and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects like UMIC, HiPEAC, Eurolab4HPC, and ARTIST. He is the coordinator of EU projects TETRACOM and TETRAMAX on academia-industry technology transfer.

Jarmo Takala received his M.Sc. (hons) degree in Electrical Engineering and Dr.Tech. degree in Information Technology from Tampere University of Technology, Tampere, Finland (TUT) in 1987 and 1999, respectively. He has held industrial positions as a Research Scientist at VTT-Automation, Tampere, Finland, and a Senior Research Engineer at Nokia Research Center. Since 2000, he has been Professor in Computer Engineering at TUT and held various positions as Head of Department of Computer Engineering, Dean of Faculty of Computing and Electrical Engineering, and currently Vice President. Dr. Takala is a senior member of IEEE and has acted as the Chair of IEEE Signal Processing Society's Design and Implementation of Signal Processing Systems Technical Committee.