Barbe Very Large Scale Integration (VLSI)

Fundamentals and Applications
1980
ISBN: 978-3-662-01003-7
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, Band 5, 282 Seiten, eBook

Reihe: Springer Series in Electronics and Photonics

Even elementary school students of today know that electronics can do fan tastic things. Electronic calculators make arithmetic easy. An electronic box connected to your TV set provides a wonderful array of games. Electron ic boxes can translate languages! Electronics has even changed watches from a pair of hands to a set of digits. Integrated circuit (IC) chips which use transistors to store information in binary form and perform bin ary arithmetic make all of this possible. In just a short twenty years the field of integrated circuits has progressed from a few transistors per chip to thousands of transistors per chip. Since the early 1960's, the field has progressed from chips containing several transistors performing simple functions such as OR and AND functions to chips presently available which contain thousands of transistors performing a wide range of memory, control and arithmetic functions. The number of special journal issues, conferences, workshops, seminars, etc. related to the field of IC's is large. l~hile no single volume could adequately summarize the field, this volume attempts to provide a summary of some of the important issues and factors for Very Large Scale Integra tion (VLSI) from the perspective of several authors deeply involved in the field. In the field of VLSI, composed of many facets and disciplines, the de mand for engineers, physicists and chemists trained in IC skills exceeds supply.

Zielgruppe

Research

Autoren/Hrsg.

Barbe, D.F.

Inhaltsverzeichnis

1. Introduction.- 1.1 Outlook.- 1.2 Scope of this Volume.- 1.3 Summary.- References.- 2. VLSI Device Fundamentals.- 2.1 Fundamentals of VLSI Device Improvements.- 2.1.1 Relative Importance of Chip Area, Circuit Innovation, and Minimum Dimension.- 2.1.2 Device Scaling Fundamentals.- 2.2 Problem Areas for VLSIC’s.- 2.2.1 Interconnections.- 2.2.2 Ionizing Particle Effects on Dynamic Logic Circuits.- 2.2.3 Active Scaling Parasitics.- 2.3 Small-Geometry MOS Anomalies.- 2.3.1 Short Channel Vt Effect.- 2.3.2 Narrow Width Vt Effect.- 2.3.3 Combination Narrow Width/Short Channel (Minimum Size) Vt Effect.- 2.3.4 Short Channel Limit for Subthreshold Conduction Effects.- 2.4 VLSIC Projections.- 2.5 Conclusions.- References.- 3. Advanced Lithography.- 3.1 Optical Lithography.- 3.1.1 Optical Resists.- 3.1.2 Contact and Proximity Printing.- 3.1.3 Projection Printing.- 3.2 Electron Lithography.- 3.2.1 Resists.- 3.2.2 Mask Generation.- 3.2.3 Electron Optics.- 3.2.4 Vector Scan.- 3.2.5 Raster Scan.- 3.2.6 Variable Beam Shape.- 3.2.7 Electron Projection.- 3.3 X-Ray Lithography.- 3.3.1 Resists.- 3.3.2 Proximity Printing.- 3.3.3 X-Ray Sources.- 3.3.4 Masks.- 3.3.5 Synchrotron Radiation.- 3.4 Ion Lithography.- 3.5 Conclusion.- References.- 4. Computer Aided Design for VLSI.- 4.1 What is Computer Aided Design?.- 4.2 History.- 4.3 State-of-the-Art.- 4.3.1 Specification.- 4.3.2 Synthesis.- 4.3.3 Simulation.- 4.3.4 Testability.- 4.3.5 Partitioning.- 4.3.6 Layout.- 4.3.7 Topological Analysis.- 4.3.8 Timing Analysis.- 4.3.9 Documentation.- 4.3.10 Data Management.- 4.3.11 Summary of Current Use of CAD.- 4.4 Perspective.- 4.4.1 The Connectivity Problem.- 4.4.2 The Layout Problem.- 4.4.3 The Problem with Mistakes.- 4.5 Management of Complexity.- 4.6 Structured Design.- 4.7 Functional Design Tools.- 4.7.1 Specification.- 4.7.2 Synthesis.- 4.7.3 Simulation.- 4.7.4 Test Development.- 4.7.5 Physical Constraints on the Functional Design.- 4.8 Physical Design Tools.- 4.8.1 Partitioning.- 4.8.2 Physical Layout.- 4.8.3 Topological Analysis.- 4.8.4 Timing Analysis.- 4.9 Design Management.- 4.9.1 Data Base.- 4.9.2 Data Management System.- 4.9.3 Data Configuration Management.- 4.9.4 Product Development Plan.- 4.9.5 Management Information System.- 4.10 Conclusion.- References.- 5. GaAs Digital Integrated Circuits for Ultra High Speed LSI/VLSI.- 5.1 Performance Advantages Expected for GaAs ICs.- 5.2 Circuit Approaches for GaAs Digital Logic ICs.- 5.2.1 Enhancement Mode FET Logic Approaches.- 5.2.2 Single Supply Enhancement — Depletion Mode MESFET Logic.- 5.2.3 D-MESFET Approach/Buffered FET Logic.- 5.2.4 D-MESFET Schottky Diode-FET Logic (SDFL).- 5.2.5 Transferred Electron Logic Device (TELD) Approach.- 5.3 GaAs Integrated Circuits: Fabrication Technology.- 5.3.1 Evolution of GaAs Process Technology.- 5.3.2 Mesa Implanted D-MESFET.- 5.3.3 Mesa Epitaxial/Implanted E-MESFET.- 5.3.4 Self-Aligned Epitaxial D-MESFET.- 5.3.5 Planar Implanted E-JFET.- 5.3.6 Planar Implanted D-MESFET.- 5.3.7 Fabrication Technology Review: Conclusions.- 5.3.8 Planar VLSI Compatible Fabrication Technology.- 5.4 Performance Results for GaAs Digital ICs.- 5.5 Summary, Conclusions and Projections.- Appendix: Nonlinear Switching Analysis for PDt Dependence on ?d and FET K-Value.- References.- 6. VLSI Architecture.- 6.1 VLSI Technology Basis.- 6.2 VLSI Device Architecture.- 6.2.1 Device Architecture Issues.- 6.2.2 VLSI Device Design Example.- 6.2.3 Example VLSI Designs.- 6.3 VLSI System Architecture.- 6.3.1 Signal Processing Algorithms.- 6.3.2 Signal Processing Architectures.- 6.3.3 Implementation.- 6.3.4 Adaptive Sonar Equalizer Design Example.- 6.4 VLSI Architecture Case Study.- 6.4.1 Basic Concepts.- 6.4.2 DBF Emulation Model.- 6.4.3 VLSI for the Real-Time DBF System.- 6.5 Conclusion.- References.- 7. VLSI Applications and Testing.- 7.1 VLSI Applications.- 7.1.1 Telephone Echo Canceller.- 7.1.2 Narrow Band Voice Channel Processing.- 7.1.3 Dual Tone Multifrequency (DTMF) Receiver.- 7.1.4 TDM-FDM Transmultiplexer.- 7.1.5 Synthetic Aperture Radar (SAR).- 7.1.6 VLSI Memories.- 7.2 VLSI Testing.- 7.2.1 Design for Testing.- 7.3 Conclusion.- References.- 8. VLSI in Other Countries.- 8.1 Past Major Semiconductor Programs.- 8.1.1 Past Developments In The United States.- 8.1.2 Past Developments In Japan.- 8.2 Present National Semiconductor Programs.- 8.2.1 United Kingdom.- 8.2.2 France.- 8.2.3 Federal Republic of Germany.- 8.2.4 Italy.- 8.2.5 The Netherlands.- 8.2.6 Japan.- 8.2.7 Korea.- 8.3 Future Prospects.- References.