Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers
2013
ISBN: 978-3-642-36156-2
Verlag: Springer

Buch, Englisch, 258 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 4161 g

Reihe: Theoretical Computer Science and General Issues

This book constitutes the refereed proceedings of the 22nd International Conference on Integrated Circuit and System Design, PATMOS 2012, held in Newcastle, UK Spain, in September 2012. The 25 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGAs. The technical program focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

Ayala, José L.

Yakovlev, Alex

Shang, Delong

Fachgebiete

• Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering Modellierung, UML, SysML
• Technische Wissenschaften Technik Allgemein Modellierung & Simulation
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf

Inhaltsverzeichnis

Sleep-Transistor Based Power-Gating Tradeoff Analyses.- Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level.- Non-invasive Power Simulation at System-Level with SystemC.- A Standard Cell Optimization Method for Near-Threshold Voltage Operations.- An Extended Metastability Simulation Method for Synchronizer Characterization.- Phase Space Based NBTI Model.- Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths.- Noise Margin Based Library Optimization Considering Variability in Sub-threshold.- TCP Window Based DVFS for Low Power Network Controller SoC.- A Generic Architecture for Robust Asynchronous Communication Links.- Direct Statistical Simulation of Timing Properties in Sequential Circuits.- On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture.- Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications.- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor.- Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation.- Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines.- Dynamic Power Management of a Computer with Self Power-Managed Components.- Case Studies of Logical Computation on Stochastic Bit Streams.