Architecture Committee Alpha Architecture Reference Manual

1. Auflage 2014
ISBN: 978-1-4832-9433-9
Verlag: Elsevier Science & Techn.
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 600 Seiten, Web PDF

Reihe: HP Technologies

This is the authoritative reference on Digital Equipment Corporation's new 64-bit RISC Alpha architecture. Written by the designers of the internal Digital specifications, this book contains complete descriptions of the common architecture required for all implementations and the interfaces required to support the OSF/1 and OpenVMS operating systems.

Autoren/Hrsg.

Architecture Committee, Alpha

Inhaltsverzeichnis

1;Front Cover;1
2;Alpha Architecture Reference Manual;4
3;Copyright Page;5
4;Table of Contents;6
5;Foreword;8
6;Preface;10
7;Part I: Common Architecture;16
7.1;Chapter 1. Introduction;26
7.1.1;1.1 The Alpha Approach to RISC Architecture;26
7.1.2;1.2 Data Format Overview;28
7.1.3;1.3 Instruction Format Overview;29
7.1.4;1.4 Instruction Overview;30
7.1.5;1.5 Instruction Set Characteristics;31
7.1.6;1.6 Terminology and Conventions;32
7.2;Chapter 2. Basic Architecture;36
7.2.1;2.1 Addressing;36
7.2.2;2.2 Data Types;36
7.3;Chapter 3. Instruction Formats;50
7.3.1;3.1 Alpha Registers;50
7.3.2;3.2 Notation;51
7.3.3;3.3 Instruction Formats;57
7.4;Chapter 4. Instruction Descriptions;64
7.4.1;4.1 Instruction Set Overview;64
7.4.2;4.2 Memory Integer Load/Store Instructions;67
7.4.3;4.3 Control Instructions;78
7.4.4;4.4 Integer Arithmetic Instructions;85
7.4.5;4.5 Logical and Shift Instructions;99
7.4.6;4.6 Byte-Manipulation Instructions;105
7.4.7;4.7 Floating-Point Instructions;119
7.4.8;4.8 Memory Format Floating-Point Instructions;131
7.4.9;4.9 Branch Format Floating-Point Instructions;140
7.4.10;4.10 Floating-Point Operate Format Instructions;143
7.4.11;4.11 Miscellaneous Instructions;176
7.4.12;4.12 VAX Compatibility Instructions;184
7.5;Chapter 5. System Architecture and Programming Implications;186
7.5.1;5.1 Introduction;186
7.5.2;5.2 Physical Memory Behavior;186
7.5.3;5.3 Translation Buffers and Virtual Caches;188
7.5.4;5.4 Caches and Write Buffers;189
7.5.5;5.5 Data Sharing;190
7.5.6;5.6 Read/Write Ordering;194
7.6;Chapter 6. Common PALcode Architecture;208
7.6.1;6.1 PALcode;208
7.6.2;6.2 PALcode Instructions and Functions;208
7.6.3;6.3 PALcode Environment;209
7.6.4;6.4 Special Functions Required for PALcode;209
7.6.5;6.5 PALcode Effects on System Code;210
7.6.6;6.6 PALcode Replacement;210
7.6.7;6.7 Required PALcode Instructions;211
7.7;Chapter 7. Console Subsystem Overview;216
7.8;Chapter 8. Input/Output;218
7.8.1;8.1 Introduction;218
7.8.2;8.2 Local I/O Space Access;219
7.8.3;8.3 Remote I/O Space Access;219
7.8.4;8.4 Direct Memory Accesss (DMA);227
7.8.5;8.5 Interrupts;229
7.8.6;8.6 I/O Bus-Specific Mailbox Usage;229
8;Part II: OpenVMS Alpha Software;232
8.1;Chapter 1. Introduction to OpenVMS Alpha;242
8.1.1;1.1 Register Usage;242
8.2;Chapter 2. OpenVMS PALcode Instruction Descriptions;244
8.2.1;2.1 Unprivileged General OpenVMS PALcode Instructions;246
8.2.2;2.2 OpenVMS Alpha Queue Data Types;264
8.2.3;2.3 Unprivileged OpenVMS Queue PALcode Instructions;273
8.2.4;2.4 Unprivileged VAX Compatibility PALcode Instructions;319
8.2.5;2.5 Unprivileged PALcode Thread Instructions;324
8.2.6;2.6 Privileged PALcode Instructions;327
8.3;Chapter 3. OpenVMS Memory Management;336
8.3.1;3.1 Introduction;336
8.3.2;3.2 Virtual Address Space;336
8.3.3;3.3 Physical Address Space;338
8.3.4;3.4 Memory Management Control;338
8.3.5;3.5 Page Table Entries;338
8.3.6;3.6 Memory Protection;342
8.3.7;3.7 Address Translation;343
8.3.8;3.8 Translation Buffer;346
8.3.9;3.9 Address Space Numbers;347
8.3.10;3.10 Memory Management Faults;348
8.4;Chapter 4. OpenVMS Process Structure;350
8.4.1;4.1 Process Definition 4-14.2 Hardware Privileged Process Context;350
8.4.2;4.2 Hardware Privileged Process Context;351
8.4.3;4.3 Asynchronous System Traps (AST);352
8.4.4;4.4 Process Context Switching;353
8.5;Chapter 5. OpenVMS Internal Processor Registers;354
8.5.1;5.1 Internal Processor Registers;354
8.5.2;5.2 Stack Pointer Internal Processor Registers;354
8.5.3;5.3 IPR Summary;355
8.6;Chapter 6. OpenVMS Exceptions, Interrupts, and Machine Checks;386
8.6.1;6.1 Introduction;386
8.6.2;6.2 Processor State and Exception/Interrupt/Machine Check Stack Frame;390
8.6.3;6.3 Exceptions;393
8.6.4;6.4 Interrupts;402
8.6.5;6.5 Machine Checks;407
8.6.6;6.6 System Control Block;410
8.6.7;6.7 PALcode Support;416
9;Part III: DEC OSF/1 Alpha Software;424
9.1;Chapter 1. Introduction to DEC OSF/1 Alpha;430
9.1.1;1.1 Programming Model;431
9.2;Chapter 2. OSF/1 PALcode Instruction Descriptions;434
9.2.1;2.1 Unprivileged PALcode Instructions;434
9.2.2;2.2 Privileged OSF/1 PALcode Instructions;441
9.3;Chapter 3. OSF/1 Memory Management;460
9.3.1;3.1 Virtual Address Spaces;460
9.3.2;3.2 Physical Address Space;462
9.3.3;3.3 Memory Management Control;462
9.3.4;3.4 Page Table Entries;462
9.3.5;3.5 Memory Protection;464
9.3.6;3.6 Address Translation for SegO and Segl;465
9.3.7;3.7 Translation Buffer;467
9.3.8;3.8 Address Space Numbers;467
9.3.9;3.9 Memory-Management Faults;468
9.4;Chapter 4. OSF/1 Process Structure;470
9.4.1;4.1 Process Definition;470
9.4.2;4.2 Process Control Block (PCB);470
9.5;Chapter 5. OSF/1 Exceptions and Interrupts;472
9.5.1;5.1 Introduction;472
9.5.2;5.2 Processor Status;473
9.5.3;5.3 Stack Frames;474
9.5.4;5.4 System Entry Addresses;474
9.5.5;5.5 PALcode Support;479
10;Appendixes;480
10.1;A Software Considerations;486
10.1.1;A.1 Hardware-Software Compact;486
10.1.2;A.2 Instruction-Stream Considerations;487
10.1.3;A. 3 Data-Stream Considerations;491
10.1.4;A.4 Code Sequences;496
10.1.5;A.5 Timing Considerations: Atomic Sequences;502
10.2;B IEEE Floating-Point Conformance;504
10.2.1;B.1 Alpha Choices for IEEE Options;504
10.2.2;B.2 Alpha Hardware Support of Software Exception Handlers;505
10.2.3;B.3 Mapping to IEEE Standard;506
10.3;C Instruction Encodings;514
10.3.1;C.1 Memory Format Instructions;514
10.3.2;C.2 Branch Format Instructions;515
10.3.3;C.3 Operate Format Instructions;515
10.3.4;C.4 Floating-Point Operate Format;516
10.3.5;C.5 Opcode Summary;519
10.3.6;C.6 OpenVMS PALcode Format Instructions;521
10.3.7;C.7 Unprivileged OSF/1 PALcode Function Codes;522
10.3.8;C.8 Privileged OSF/1 PALcode function codes;522
10.3.9;C.9 Required PALcode Function Codes;523
10.3.10;C.10 Opcodes Reserved to PALcode;523
10.3.11;C.11 Opcodes Reserved to Digital;523
11;Index;524