Buch, Englisch, 320 Seiten, Format (B × H): 166 mm x 235 mm, Gewicht: 635 g
Design-for-Test Using Simulink and Stateflow
Buch, Englisch, 320 Seiten, Format (B × H): 166 mm x 235 mm, Gewicht: 635 g
ISBN: 978-0-8493-3057-5
Verlag: Taylor & Francis Inc
A current trend in digital design-the integration of the MATLAB® components Simulink® and Stateflow® for model building, simulations, system testing, and fault detection-allows for better control over the design flow process and, ultimately, for better system results. Digital Integrated Circuits: Design-for-Test Using Simulink® and Stateflow® illustrates the construction of Simulink models for digital project test benches in certain design-for-test fields.
The first two chapters of the book describe the major tools used for design-for-test. The author explains the process of Simulink model building, presents the main library blocks of Simulink, and examines the development of finite-state machine modeling using Stateflow diagrams. Subsequent chapters provide examples of Simulink modeling and simulation for the latest design-for-test fields, including combinational and sequential circuits, controllability, and observability; deterministic algorithms; digital circuit dynamics; timing verification; built-in self-test (BIST) architecture; scan cell operations; and functional and diagnostic testing. The book also discusses the automatic test pattern generation (ATPG) process, the logical determinant theory, and joint test action group (JTAG) interface models.
Digital Integrated Circuits explores the possibilities of MATLAB's tools in the development of application-specific integrated circuit (ASIC) design systems. The book shows how to incorporate Simulink and Stateflow into the process of modern digital design.
Zielgruppe
Undergraduate
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
Simulink®: Dynamic System Simulation for MATLAB®. Stateflow®: Creating Finite State Machine Models. Fault Modeling and Simulation. Testability Analysis Methods. The Automatic Test Pattern Generation (ATPG) Process. Timing Verification. System and Embedded Core Testing. Index.
