Buch, Englisch, 146 Seiten, HC runder Rücken kaschiert, Format (B × H): 160 mm x 241 mm, Gewicht: 424 g
Buch, Englisch, 146 Seiten, HC runder Rücken kaschiert, Format (B × H): 160 mm x 241 mm, Gewicht: 424 g
ISBN: 978-0-7923-8382-6
Verlag: Springer US
Existing techniques for this analysis have one or more of the following limitations:
- they cannot model complicated programs
- they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines
- they cannot be easily retargeted for new hardware platforms.
In , a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modeling.
will be of interest to Design Automation professionals as well as designers of circuits and systems.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Geisteswissenschaften Design Produktdesign, Industriedesign
- Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
- Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
- Mathematik | Informatik EDV | Informatik Informatik
- Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
Weitere Infos & Material
1. Introduction.- 1.1 The Emergence of Embedded Systems.- 1.2 Performance Constraints of Embedded Systems.- 1.3 Challenges in Designing Embedded Systems.- 1.4 Research Goals.- 1.5 Summary.- 1.6 Organization of this Book.- 2. Related Work in Timing Analysis for Embedded Software.- 2.1 Introduction.- 2.2 Program Path Analysis.- 2.3 Microarchitecture Modeling.- 2.4 Retargetability Issues.- 2.5 Summary.- 3. Program Path Analysis.- 3.1 Introduction.- 3.2 Problems with Program Path Analysis.- 3.3 Execution Count Analysis.- 3.4 Program Control Flow and Logical Flow.- 3.5 Integer Linear Programming Formulation.- 3.6 Solving ILP Problems.- 3.7 Experimental Validation.- 3.8 Chapter Conclusions.- 4. Microarchitecture Modeling.- 4.1 Introduction.- 4.2 Simple Microarchitectures.- 4.3 Advanced Microarchitectures and Memory Systems.- 4.4 Cache Modeling.- 4.5 Instruction Cache Modeling.- 4.6 Direct Mapped Instruction Cache Analysis.- 4.7 Set Associative Instruction Cache Analysis.- 4.8 Interprocedural Calls.- 4.9 Data Cache Modeling.- 4.10 Pipeline Modeling.- 4.11 Experiments.- 4.12 Chapter Conclusions.- 5. A Retargetable Timing Analysis Tool — Cinderella.- 5.1 Introduction.- 5.2 Issues in Timing Analysis.- 5.3 Classification of Retargeting Information.- 5.4 Implementation of Retargetable Modules.- 5.5 Operations.- 5.6 Chapter Conclusions.- 6. Conclusions.- 6.1 Contributions.- 6.2 Future Research Directions.- Appendices.- A — Practical Complexity of the ILP Problems.- References.