E-Book, Englisch, Band 260, 193 Seiten, eBook
Reihe: The Springer International Series in Engineering and Computer Science
Kitano Speech-to-Speech Translation
Erscheinungsjahr 2012
ISBN: 978-1-4615-2732-9
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
A Massively Parallel Memory-Based Approach
E-Book, Englisch, Band 260, 193 Seiten, eBook
Reihe: The Springer International Series in Engineering and Computer Science
ISBN: 978-1-4615-2732-9
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
1 Introduction.- 1.1 Speech-to-Speech Dialogue Translation.- 1.2 Why Spoken Language Translation is So Difficult?.- 1.3 A Brief History of Speech Translation Related Fields.- 2 Current Research Toward Speech-to-Speech Translation.- 2.1 SpeechTrans.- 2.2 SL-TRANS.- 2.3 JANUS.- 2.4 MINDS.- 2.5 Knowledge-Based Machine Translation System.- 2.6 The HMM-LR Method.- 3 Design Philosophy Behind The ? DMDIALOG System.- 3.1 Introduction.- 3.2 Memory-Based Approach to Natural Language Processing.- 3.3 Massively Parallel Computing.- 3.4 Marker-Passing.- 4 The ? DMDIALOG System.- 4.1 Introduction.- 4.2 An Overview of the Model.- 4.3 Speech Input Processing.- 4.4 Memory-Based Parsing.- 4.5 Syntactic/Semantic Parsing.- 4.6 Discourse Processing.- 4.7 Prediction from the Language Model.- 4.8 Cost-based Ambiguity Resolution.- 4.9 Interlingua with Multiple Levels of Abstraction.- 4.10 Generation.- 4.11 Simultaneous Interpretation: Generation while Parsing is in Progress.- 4.12 Related Works.- 4.13 Discussions.- 4.14 Conclusion.- 5 DMSNAP: An Implementation On The Snap Semantic Network Array Processor.- 5.1 Introduction.- 5.2 SNAP Architecture.- 5.3 Philosophy Behind DMSNAP.- 5.4 Implementation of DMSNAP.- 5.5 Linguistic Processing in DMSNAP.- 5.6 Performance.- 5.7 Conclusion.- 6 Astral: An Implementation On The IXM2 Associative Memory Processor.- 6.1 Introduction.- 6.2 The Massively Parallel Associative Processor IXM2.- 6.3 Experimental Implementation I: A Flat Pattern Model.- 6.4 Performance.- 6.5 Memory and Processor Requirements.- 6.6 Enhancement: Hierarchical Memory Network.- 6.7 Experimental Implementation II: Hierarchical Memory Network Model.- 6.8 Performance.- 6.9 Hardware Architecture for Memory-Based Parsing.- 6.10 Conclusion.- 7 Memoir: An Alternative View.- 7.1 Introduction.-7.2 Overall Architecture.- 7.3 Knowledge Sources.- 7.4 Grammatical Inference.- 7.5 Examples Retrieval.- 7.6 Adaptive Translation.- 7.7 Monitor.- 7.8 Preliminary Evaluation.- 7.9 Conclusion.- 8 Conclusion.- 8.1 Summary of Contributions.- 8.2 Future Works.- 8.3 Final Remarks.